Loading arch/arm/mm/copypage-v6.c +2 −4 Original line number Diff line number Diff line Loading @@ -30,8 +30,6 @@ static DEFINE_SPINLOCK(v6_lock); #define DCACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT) /* * Copy the user page. No aliasing to deal with so we can just * attack the kernel's existing mapping of these pages. Loading @@ -55,7 +53,7 @@ void v6_clear_user_page_nonaliasing(void *kaddr, unsigned long vaddr) */ void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned long vaddr) { unsigned int offset = DCACHE_COLOUR(vaddr); unsigned int offset = CACHE_COLOUR(vaddr); unsigned long from, to; /* Loading Loading @@ -95,7 +93,7 @@ void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned long vadd */ void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr) { unsigned int offset = DCACHE_COLOUR(vaddr); unsigned int offset = CACHE_COLOUR(vaddr); unsigned long to = to_address + (offset << PAGE_SHIFT); /* Loading include/asm-arm/cacheflush.h +3 −0 Original line number Diff line number Diff line Loading @@ -16,6 +16,9 @@ #include <asm/mman.h> #include <asm/glue.h> #include <asm/shmparam.h> #define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT) /* * Cache Model Loading Loading
arch/arm/mm/copypage-v6.c +2 −4 Original line number Diff line number Diff line Loading @@ -30,8 +30,6 @@ static DEFINE_SPINLOCK(v6_lock); #define DCACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT) /* * Copy the user page. No aliasing to deal with so we can just * attack the kernel's existing mapping of these pages. Loading @@ -55,7 +53,7 @@ void v6_clear_user_page_nonaliasing(void *kaddr, unsigned long vaddr) */ void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned long vaddr) { unsigned int offset = DCACHE_COLOUR(vaddr); unsigned int offset = CACHE_COLOUR(vaddr); unsigned long from, to; /* Loading Loading @@ -95,7 +93,7 @@ void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned long vadd */ void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr) { unsigned int offset = DCACHE_COLOUR(vaddr); unsigned int offset = CACHE_COLOUR(vaddr); unsigned long to = to_address + (offset << PAGE_SHIFT); /* Loading
include/asm-arm/cacheflush.h +3 −0 Original line number Diff line number Diff line Loading @@ -16,6 +16,9 @@ #include <asm/mman.h> #include <asm/glue.h> #include <asm/shmparam.h> #define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT) /* * Cache Model Loading