Commit ba512eaa authored by Wayne Lin's avatar Wayne Lin Committed by Alex Deucher
Browse files

drm/amdgpu/display/mst: adjust the logic in 2nd phase of updating payload



[why & how]
adjust the coding in dm_helpers_dp_mst_send_payload_allocation()
for reading easily.

Signed-off-by: default avatarWayne Lin <Wayne.Lin@amd.com>
Signed-off-by: default avatarHarry Wentland <harry.wentland@amd.com>
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f0127cb1
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+5 −1
Original line number Diff line number Diff line
@@ -277,6 +277,7 @@ bool dm_helpers_dp_mst_send_payload_allocation(
	struct drm_dp_mst_atomic_payload *payload;
	enum mst_progress_status set_flag = MST_ALLOCATE_NEW_PAYLOAD;
	enum mst_progress_status clr_flag = MST_CLEAR_ALLOCATED_PAYLOAD;
	int ret = 0;

	aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;

@@ -293,7 +294,10 @@ bool dm_helpers_dp_mst_send_payload_allocation(
		clr_flag = MST_ALLOCATE_NEW_PAYLOAD;
	}

	if (enable && drm_dp_add_payload_part2(mst_mgr, mst_state->base.state, payload)) {
	if (enable)
		ret = drm_dp_add_payload_part2(mst_mgr, mst_state->base.state, payload);

	if (ret) {
		amdgpu_dm_set_mst_status(&aconnector->mst_status,
			set_flag, false);
	} else {