Unverified Commit be7dc10a authored by Cezary Rojewski's avatar Cezary Rojewski Committed by Mark Brown
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ASoC: codecs: es8316: Add support for 24 MHz MCLK 



MCLK operates on 24MHz on Intel KabyLake-based platforms. To support
that frequency add new MCLK-LRCK ratio.

While at it, utilize ARRAY_SIZE rather than hardcode to improve
robustness.

Cc: Zhu Ning <zhuning@everest-semi.com>
Signed-off-by: default avatarCezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20230629112449.1755928-2-cezary.rojewski@intel.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 3d74f42c

sound/soc/codecs/es8316.c

+2 −2
Original line number Diff line number Diff line
@@ -27,9 +27,9 @@ 
 * MCLK/LRCK ratios, but we also add ratio 400, which is commonly used on

 * Intel Cherry Trail platforms (19.2MHz MCLK, 48kHz LRCK).

 */

#define NR_SUPPORTED_MCLK_LRCK_RATIOS 6

#define NR_SUPPORTED_MCLK_LRCK_RATIOS ARRAY_SIZE(supported_mclk_lrck_ratios)

static const unsigned int supported_mclk_lrck_ratios[] = {

	256, 384, 400, 512, 768, 1024

	256, 384, 400, 500, 512, 768, 1024

};



struct es8316_priv {