Commit bfcf62c2 authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher
Browse files

drm/amdgpu/sdma: switch to amdgpu_sdma_ras_late_init helper function 



amdgpu_sdma_ras_late_init is used to init sdma specfic
ras debugfs/sysfs node and sdma specific interrupt handler.
It can be shared among sdma generations

Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarTao Zhou <tao.zhou1@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6caeee7a

drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c

+52 −0
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 


#include "amdgpu.h"

#include "amdgpu_sdma.h"

#include "amdgpu_ras.h"



#define AMDGPU_CSA_SDMA_SIZE 64

/* SDMA CSA reside in the 3rd page of CSA */
@@ -83,3 +84,54 @@ uint64_t amdgpu_sdma_get_csa_mc_addr(struct amdgpu_ring *ring, 


	return csa_mc_addr;

}



int amdgpu_sdma_ras_late_init(struct amdgpu_device *adev,

			      void *ras_ih_info)

{

	int r, i;

	struct ras_ih_if *ih_info = (struct ras_ih_if *)ras_ih_info;

	struct ras_fs_if fs_info = {

		.sysfs_name = "sdma_err_count",

		.debugfs_name = "sdma_err_inject",

	};



	if (!ih_info)

		return -EINVAL;



	if (!adev->sdma.ras_if) {

		adev->sdma.ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);

		if (!adev->sdma.ras_if)

			return -ENOMEM;

		adev->sdma.ras_if->block = AMDGPU_RAS_BLOCK__SDMA;

		adev->sdma.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;

		adev->sdma.ras_if->sub_block_index = 0;

		strcpy(adev->sdma.ras_if->name, "sdma");

	}

	fs_info.head = ih_info->head = *adev->sdma.ras_if;



	r = amdgpu_ras_late_init(adev, adev->sdma.ras_if,

				 &fs_info, ih_info);

	if (r)

		goto free;



	if (amdgpu_ras_is_supported(adev, adev->sdma.ras_if->block)) {

		for (i = 0; i < adev->sdma.num_instances; i++) {

			r = amdgpu_irq_get(adev, &adev->sdma.ecc_irq,

				AMDGPU_SDMA_IRQ_INSTANCE0 + i);

			if (r)

				goto late_fini;

		}

	} else {

		r = 0;

		goto free;

	}



        return 0;



late_fini:

	amdgpu_ras_late_fini(adev, adev->sdma.ras_if, ih_info);

free:

	kfree(adev->sdma.ras_if);

	adev->sdma.ras_if = NULL;

	return r;

}

drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h

+2 −0
Original line number Diff line number Diff line
@@ -104,4 +104,6 @@ struct amdgpu_sdma_instance * 
amdgpu_sdma_get_instance_from_ring(struct amdgpu_ring *ring);

int amdgpu_sdma_get_index_from_ring(struct amdgpu_ring *ring, uint32_t *index);

uint64_t amdgpu_sdma_get_csa_mc_addr(struct amdgpu_ring *ring, unsigned vmid);

int amdgpu_sdma_ras_late_init(struct amdgpu_device *adev,

			      void *ras_ih_info);

#endif

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

+1 −41
Original line number Diff line number Diff line
@@ -1699,48 +1699,8 @@ static int sdma_v4_0_late_init(void *handle) 
	struct ras_ih_if ih_info = {

		.cb = sdma_v4_0_process_ras_data_cb,

	};

	struct ras_fs_if fs_info = {

		.sysfs_name = "sdma_err_count",

		.debugfs_name = "sdma_err_inject",

	};

	int r, i;



	if (!adev->sdma.ras_if) {

		adev->sdma.ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);

		if (!adev->sdma.ras_if)

			return -ENOMEM;

		adev->sdma.ras_if->block = AMDGPU_RAS_BLOCK__SDMA;

		adev->sdma.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;

		adev->sdma.ras_if->sub_block_index = 0;

		strcpy(adev->sdma.ras_if->name, "sdma");

	}

	fs_info.head = ih_info.head = *adev->sdma.ras_if;



	r = amdgpu_ras_late_init(adev, adev->sdma.ras_if,

				 &fs_info, &ih_info);

	if (r)

		goto free;



	if (amdgpu_ras_is_supported(adev, adev->sdma.ras_if->block)) {

		for (i = 0; i < adev->sdma.num_instances; i++) {

			r = amdgpu_irq_get(adev, &adev->sdma.ecc_irq,

				AMDGPU_SDMA_IRQ_INSTANCE0 + i);

			if (r)

				goto late_fini;

		}

	} else {

		/* free sdma ras_if if sdma ras is not supported */

		r = 0;

		goto free;

	}



        return 0;

late_fini:

	amdgpu_ras_late_fini(adev, adev->sdma.ras_if, &ih_info);

free:

	kfree(adev->sdma.ras_if);

	adev->sdma.ras_if = NULL;

	return r;

	return amdgpu_sdma_ras_late_init(adev, &ih_info);

}



static int sdma_v4_0_sw_init(void *handle)