Commit c02bda09 authored by Thierry Reding's avatar Thierry Reding Committed by Will Deacon
Browse files

dt-bindings: arm-smmu: Document nvidia,memory-controller property 



On NVIDIA SoC's the ARM SMMU needs to interact with the memory
controller in order to map memory clients to the corresponding stream
IDs. Document how the nvidia,memory-controller property can be used to
achieve this.

Note that this is a backwards-incompatible change that is, however,
necessary to ensure correctness. Without the new property, most of the
devices would still work but it is not guaranteed that all will.

Reviewed-by: default avatarRob Herring <robh@kernel.org>
Acked-by: default avatarWill Deacon <will@kernel.org>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20220429082243.496000-2-thierry.reding@gmail.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent d044023e

Documentation/devicetree/bindings/iommu/arm,smmu.yaml

+17 −0
Original line number Diff line number Diff line
@@ -159,6 +159,17 @@ properties: 
  power-domains:

    maxItems: 1



  nvidia,memory-controller:

    description: |

      A phandle to the memory controller on NVIDIA Tegra186 and later SoCs.

      The memory controller needs to be programmed with a mapping of memory

      client IDs to ARM SMMU stream IDs.



      If this property is absent, the mapping programmed by early firmware

      will be used and it is not guaranteed that IOMMU translations will be

      enabled for any given device.

    $ref: /schemas/types.yaml#/definitions/phandle



required:

  - compatible

  - reg
@@ -181,6 +192,12 @@ allOf: 
        reg:

          minItems: 1

          maxItems: 2



      # The reference to the memory controller is required to ensure that the

      # memory client to stream ID mapping can be done synchronously with the

      # IOMMU attachment.

      required:

        - nvidia,memory-controller

    else:

      properties:

        reg: