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Commit c08ceea3 authored by Andrew Bresticker's avatar Andrew Bresticker Committed by Tomasz Figa
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ARM: dts: exynos5250: add input clocks to audss clock controller 



Specify pll_ref, pll_in, sclk_audio, and sclk_pcm_in for the AudioSS
clock controller.

Signed-off-by: default avatarAndrew Bresticker <abrestic@chromium.org>
Acked-by: default avatarMike Turquette <mturquette@linaro.org>
Acked-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: default avatarTomasz Figa <t.figa@samsung.com>
parent 35399dda
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