Commit c0e14fc7 authored by Benjamin Gaignard's avatar Benjamin Gaignard Committed by Alexandre TORGUE
Browse files

ARM: dts: stm32: add Timers driver for stm32f429 MCU 



Add Timers and it sub-nodes into DT for stm32f429 family.

Signed-off-by: default avatarBenjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: default avatarAlexandre TORGUE <alexandre.torgue@st.com>
parent a4e6964a

arch/arm/boot/dts/stm32f429.dtsi

+275 −0
Original line number Diff line number Diff line
@@ -86,6 +86,27 @@ timer2: timer@40000000 { 
			status = "disabled";

		};



		timers2: timers@40000000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "st,stm32-timers";

			reg = <0x40000000 0x400>;

			clocks = <&rcc 0 128>;

			clock-names = "int";

			status = "disabled";



			pwm {

				compatible = "st,stm32-pwm";

				status = "disabled";

			};



			timer@1 {

				compatible = "st,stm32-timer-trigger";

				reg = <1>;

				status = "disabled";

			};

		};



		timer3: timer@40000400 {

			compatible = "st,stm32-timer";

			reg = <0x40000400 0x400>;
@@ -94,6 +115,27 @@ timer3: timer@40000400 { 
			status = "disabled";

		};



		timers3: timers@40000400 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "st,stm32-timers";

			reg = <0x40000400 0x400>;

			clocks = <&rcc 0 129>;

			clock-names = "int";

			status = "disabled";



			pwm {

				compatible = "st,stm32-pwm";

				status = "disabled";

			};



			timer@2 {

				compatible = "st,stm32-timer-trigger";

				reg = <2>;

				status = "disabled";

			};

		};



		timer4: timer@40000800 {

			compatible = "st,stm32-timer";

			reg = <0x40000800 0x400>;
@@ -102,6 +144,27 @@ timer4: timer@40000800 { 
			status = "disabled";

		};



		timers4: timers@40000800 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "st,stm32-timers";

			reg = <0x40000800 0x400>;

			clocks = <&rcc 0 130>;

			clock-names = "int";

			status = "disabled";



			pwm {

				compatible = "st,stm32-pwm";

				status = "disabled";

			};



			timer@3 {

				compatible = "st,stm32-timer-trigger";

				reg = <3>;

				status = "disabled";

			};

		};



		timer5: timer@40000c00 {

			compatible = "st,stm32-timer";

			reg = <0x40000c00 0x400>;
@@ -109,6 +172,27 @@ timer5: timer@40000c00 { 
			clocks = <&rcc 0 131>;

		};



		timers5: timers@40000c00 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "st,stm32-timers";

			reg = <0x40000C00 0x400>;

			clocks = <&rcc 0 131>;

			clock-names = "int";

			status = "disabled";



			pwm {

				compatible = "st,stm32-pwm";

				status = "disabled";

			};



			timer@4 {

				compatible = "st,stm32-timer-trigger";

				reg = <4>;

				status = "disabled";

			};

		};



		timer6: timer@40001000 {

			compatible = "st,stm32-timer";

			reg = <0x40001000 0x400>;
@@ -117,6 +201,22 @@ timer6: timer@40001000 { 
			status = "disabled";

		};



		timers6: timers@40001000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "st,stm32-timers";

			reg = <0x40001000 0x400>;

			clocks = <&rcc 0 132>;

			clock-names = "int";

			status = "disabled";



			timer@5 {

				compatible = "st,stm32-timer-trigger";

				reg = <5>;

				status = "disabled";

			};

		};



		timer7: timer@40001400 {

			compatible = "st,stm32-timer";

			reg = <0x40001400 0x400>;
@@ -125,6 +225,73 @@ timer7: timer@40001400 { 
			status = "disabled";

		};



		timers7: timers@40001400 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "st,stm32-timers";

			reg = <0x40001400 0x400>;

			clocks = <&rcc 0 133>;

			clock-names = "int";

			status = "disabled";



			timer@6 {

				compatible = "st,stm32-timer-trigger";

				reg = <6>;

				status = "disabled";

			};

		};



		timers12: timers@40001800 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "st,stm32-timers";

			reg = <0x40001800 0x400>;

			clocks = <&rcc 0 134>;

			clock-names = "int";

			status = "disabled";



			pwm {

				compatible = "st,stm32-pwm";

				status = "disabled";

			};



			timer@11 {

				compatible = "st,stm32-timer-trigger";

				reg = <11>;

				status = "disabled";

			};

		};



		timers13: timers@40001c00 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "st,stm32-timers";

			reg = <0x40001C00 0x400>;

			clocks = <&rcc 0 135>;

			clock-names = "int";

			status = "disabled";



			pwm {

				compatible = "st,stm32-pwm";

				status = "disabled";

			};

		};



		timers14: timers@40002000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "st,stm32-timers";

			reg = <0x40002000 0x400>;

			clocks = <&rcc 0 136>;

			clock-names = "int";

			status = "disabled";



			pwm {

				compatible = "st,stm32-pwm";

				status = "disabled";

			};

		};



		rtc: rtc@40002800 {

			compatible = "st,stm32-rtc";

			reg = <0x40002800 0x400>;
@@ -190,6 +357,48 @@ usart8: serial@40007c00 { 
			status = "disabled";

		};



		timers1: timers@40010000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "st,stm32-timers";

			reg = <0x40010000 0x400>;

			clocks = <&rcc 0 160>;

			clock-names = "int";

			status = "disabled";



			pwm {

				compatible = "st,stm32-pwm";

				status = "disabled";

			};



			timer@0 {

				compatible = "st,stm32-timer-trigger";

				reg = <0>;

				status = "disabled";

			};

		};



		timers8: timers@40010400 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "st,stm32-timers";

			reg = <0x40010400 0x400>;

			clocks = <&rcc 0 161>;

			clock-names = "int";

			status = "disabled";



			pwm {

				compatible = "st,stm32-pwm";

				status = "disabled";

			};



			timer@7 {

				compatible = "st,stm32-timer-trigger";

				reg = <7>;

				status = "disabled";

			};

		};



		usart1: serial@40011000 {

			compatible = "st,stm32-usart", "st,stm32-uart";

			reg = <0x40011000 0x400>;
@@ -265,6 +474,57 @@ exti: interrupt-controller@40013c00 { 
			interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <42>, <62>, <76>;

		};



		timers9: timers@40014000 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "st,stm32-timers";

			reg = <0x40014000 0x400>;

			clocks = <&rcc 0 176>;

			clock-names = "int";

			status = "disabled";



			pwm {

				compatible = "st,stm32-pwm";

				status = "disabled";

			};



			timer@8 {

				compatible = "st,stm32-timer-trigger";

				reg = <8>;

				status = "disabled";

			};

		};



		timers10: timers@40014400 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "st,stm32-timers";

			reg = <0x40014400 0x400>;

			clocks = <&rcc 0 177>;

			clock-names = "int";

			status = "disabled";



			pwm {

				compatible = "st,stm32-pwm";

				status = "disabled";

			};

		};



		timers11: timers@40014800 {

			#address-cells = <1>;

			#size-cells = <0>;

			compatible = "st,stm32-timers";

			reg = <0x40014800 0x400>;

			clocks = <&rcc 0 178>;

			clock-names = "int";

			status = "disabled";



			pwm {

				compatible = "st,stm32-pwm";

				status = "disabled";

			};

		};



		pwrcfg: power-config@40007000 {

			compatible = "syscon";

			reg = <0x40007000 0x400>;
@@ -438,6 +698,21 @@ pins { 
					pinmux = <STM32F429_PF10_FUNC_ANALOG>;

				};

			};



			pwm1_pins: pwm@1 {

				pins {

					pinmux = <STM32F429_PA8_FUNC_TIM1_CH1>,

						 <STM32F429_PB13_FUNC_TIM1_CH1N>,

						 <STM32F429_PB12_FUNC_TIM1_BKIN>;

				};

			};



			pwm3_pins: pwm@3 {

				pins {

					pinmux = <STM32F429_PB4_FUNC_TIM3_CH1>,

						 <STM32F429_PB5_FUNC_TIM3_CH2>;

				};

			};

		};



		rcc: rcc@40023810 {