Commit c0fe82ba authored by Jason Gunthorpe's avatar Jason Gunthorpe
Browse files

Merge tag 'v5.16' into rdma.git for-next



To resolve minor conflict in:
        drivers/infiniband/hw/mlx5/mlx5_ib.h

By merging both hunks.

Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
parents c40238e3 df0cc57e
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+8 −2
Original line number Diff line number Diff line
@@ -1689,6 +1689,8 @@
			architectures force reset to be always executed
	i8042.unlock	[HW] Unlock (ignore) the keylock
	i8042.kbdreset	[HW] Reset device connected to KBD port
	i8042.probe_defer
			[HW] Allow deferred probing upon i8042 probe errors

	i810=		[HW,DRM]

@@ -2413,8 +2415,12 @@
			Default is 1 (enabled)

	kvm-intel.emulate_invalid_guest_state=
			[KVM,Intel] Enable emulation of invalid guest states
			Default is 0 (disabled)
			[KVM,Intel] Disable emulation of invalid guest state.
			Ignored if kvm-intel.enable_unrestricted_guest=1, as
			guest state is never invalid for unrestricted guests.
			This param doesn't apply to nested guests (L2), as KVM
			never emulates invalid L2 guest state.
			Default is 1 (enabled)

	kvm-intel.flexpriority=
			[KVM,Intel] Disable FlexPriority feature (TPR shadow).
+4 −4
Original line number Diff line number Diff line
@@ -20,9 +20,9 @@ allOf:

properties:
  compatible:
    enum:
      - apple,t8103-i2c
      - apple,i2c
    items:
      - const: apple,t8103-i2c
      - const: apple,i2c

  reg:
    maxItems: 1
@@ -51,7 +51,7 @@ unevaluatedProperties: false
examples:
  - |
    i2c@35010000 {
      compatible = "apple,t8103-i2c";
      compatible = "apple,t8103-i2c", "apple,i2c";
      reg = <0x35010000 0x4000>;
      interrupt-parent = <&aic>;
      interrupts = <0 627 4>;
+25 −0
Original line number Diff line number Diff line
@@ -51,6 +51,19 @@ patternProperties:
    description:
      Properties for single BUCK regulator.

    properties:
      op_mode:
        $ref: /schemas/types.yaml#/definitions/uint32
        enum: [0, 1, 2, 3]
        default: 1
        description: |
          Describes the different operating modes of the regulator with power
          mode change in SOC. The different possible values are:
            0 - always off mode
            1 - on in normal mode
            2 - low power mode
            3 - suspend mode

    required:
      - regulator-name

@@ -63,6 +76,18 @@ patternProperties:
      Properties for single BUCK regulator.

    properties:
      op_mode:
        $ref: /schemas/types.yaml#/definitions/uint32
        enum: [0, 1, 2, 3]
        default: 1
        description: |
          Describes the different operating modes of the regulator with power
          mode change in SOC. The different possible values are:
            0 - always off mode
            1 - on in normal mode
            2 - low power mode
            3 - suspend mode

      s5m8767,pmic-ext-control-gpios:
        maxItems: 1
        description: |
+1 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ properties:
              - ti,am654-ospi
              - intel,lgm-qspi
              - xlnx,versal-ospi-1.0
              - intel,socfpga-qspi
          - const: cdns,qspi-nor
      - const: cdns,qspi-nor

+5 −3
Original line number Diff line number Diff line
@@ -11,9 +11,11 @@ systems. Some systems use variants that don't meet branding requirements,
and so are not advertised as being I2C but come under different names,
e.g. TWI (Two Wire Interface), IIC.

The official I2C specification is the `"I2C-bus specification and user
manual" (UM10204) <https://www.nxp.com/docs/en/user-guide/UM10204.pdf>`_
published by NXP Semiconductors.
The latest official I2C specification is the `"I2C-bus specification and user
manual" (UM10204) <https://www.nxp.com/webapp/Download?colCode=UM10204>`_
published by NXP Semiconductors. However, you need to log-in to the site to
access the PDF. An older version of the specification (revision 6) is archived
`here <https://web.archive.org/web/20210813122132/https://www.nxp.com/docs/en/user-guide/UM10204.pdf>`_.

SMBus (System Management Bus) is based on the I2C protocol, and is mostly
a subset of I2C protocols and signaling.  Many I2C devices will work on an
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