Commit c3a064a3 authored by Sam Shih's avatar Sam Shih Committed by Matthias Brugger
Browse files

arm64: dts: mediatek: add pinctrl support for mt7986a



Add mt7986a pinctrl node, and update pinmux setting for mt7986a

Signed-off-by: default avatarSam Shih <sam.shih@mediatek.com>
Link: https://lore.kernel.org/r/20211122123552.8218-2-sam.shih@mediatek.com


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent fd31f778
Loading
Loading
Loading
Loading
+20 −0
Original line number Diff line number Diff line
@@ -29,9 +29,29 @@ &uart0 {
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;
	status = "okay";
};

&pio {
	uart1_pins: uart1-pins {
		mux {
			function = "uart";
			groups = "uart1";
		};
	};

	uart2_pins: uart2-pins {
		mux {
			function = "uart";
			groups = "uart2";
		};
	};
};
+21 −0
Original line number Diff line number Diff line
@@ -107,6 +107,27 @@ watchdog: watchdog@1001c000 {
			status = "disabled";
		};

		pio: pinctrl@1001f000 {
			compatible = "mediatek,mt7986a-pinctrl";
			reg = <0 0x1001f000 0 0x1000>,
			      <0 0x11c30000 0 0x1000>,
			      <0 0x11c40000 0 0x1000>,
			      <0 0x11e20000 0 0x1000>,
			      <0 0x11e30000 0 0x1000>,
			      <0 0x11f00000 0 0x1000>,
			      <0 0x11f10000 0 0x1000>,
			      <0 0x1000b000 0 0x1000>;
			reg-names = "gpio", "iocfg_rt", "iocfg_rb", "iocfg_lt",
				    "iocfg_lb", "iocfg_tr", "iocfg_tl", "eint";
			gpio-controller;
			#gpio-cells = <2>;
			gpio-ranges = <&pio 0 0 100>;
			interrupt-controller;
			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-parent = <&gic>;
			#interrupt-cells = <2>;
		};

		trng: trng@1020f000 {
			compatible = "mediatek,mt7986-rng",
				     "mediatek,mt7623-rng";