Commit c3bbe55c authored by Sibi Sankar's avatar Sibi Sankar Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sc7280: Add nodes to boot WPSS 



Add miscellaneous nodes to boot the Wireless Processor Subsystem (WPSS) on
SC7280 SoCs.

Signed-off-by: default avatarSibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/1619508824-14413-6-git-send-email-sibis@codeaurora.org


Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent a1dff44b

arch/arm64/boot/dts/qcom/sc7280.dtsi

+138 −0
Original line number Diff line number Diff line
@@ -11,6 +11,8 @@ 
#include <dt-bindings/mailbox/qcom-ipcc.h>

#include <dt-bindings/power/qcom-aoss-qmp.h>

#include <dt-bindings/power/qcom-rpmpd.h>

#include <dt-bindings/reset/qcom,sdm845-aoss.h>

#include <dt-bindings/reset/qcom,sdm845-pdc.h>

#include <dt-bindings/soc/qcom,rpmh-rsc.h>

#include <dt-bindings/thermal/thermal.h>
@@ -52,6 +54,11 @@ aop_cmd_db_mem: memory@80860000 { 
			no-map;

		};



		smem_mem: memory@80900000 {

			reg = <0x0 0x80900000 0x0 0x200000>;

			no-map;

		};



		cpucp_mem: memory@80b00000 {

			no-map;

			reg = <0x0 0x80b00000 0x0 0x100000>;
@@ -268,6 +275,119 @@ scm { 
		};

	};



	smem {

		compatible = "qcom,smem";

		memory-region = <&smem_mem>;

		hwlocks = <&tcsr_mutex 3>;

	};



	smp2p-adsp {

		compatible = "qcom,smp2p";

		qcom,smem = <443>, <429>;

		interrupts-extended = <&ipcc IPCC_CLIENT_LPASS

					     IPCC_MPROC_SIGNAL_SMP2P

					     IRQ_TYPE_EDGE_RISING>;

		mboxes = <&ipcc IPCC_CLIENT_LPASS

				IPCC_MPROC_SIGNAL_SMP2P>;



		qcom,local-pid = <0>;

		qcom,remote-pid = <2>;



		adsp_smp2p_out: master-kernel {

			qcom,entry-name = "master-kernel";

			#qcom,smem-state-cells = <1>;

		};



		adsp_smp2p_in: slave-kernel {

			qcom,entry-name = "slave-kernel";

			interrupt-controller;

			#interrupt-cells = <2>;

		};

	};



	smp2p-cdsp {

		compatible = "qcom,smp2p";

		qcom,smem = <94>, <432>;

		interrupts-extended = <&ipcc IPCC_CLIENT_CDSP

					     IPCC_MPROC_SIGNAL_SMP2P

					     IRQ_TYPE_EDGE_RISING>;

		mboxes = <&ipcc IPCC_CLIENT_CDSP

				IPCC_MPROC_SIGNAL_SMP2P>;



		qcom,local-pid = <0>;

		qcom,remote-pid = <5>;



		cdsp_smp2p_out: master-kernel {

			qcom,entry-name = "master-kernel";

			#qcom,smem-state-cells = <1>;

		};



		cdsp_smp2p_in: slave-kernel {

			qcom,entry-name = "slave-kernel";

			interrupt-controller;

			#interrupt-cells = <2>;

		};

	};



	smp2p-mpss {

		compatible = "qcom,smp2p";

		qcom,smem = <435>, <428>;

		interrupts-extended = <&ipcc IPCC_CLIENT_MPSS

					     IPCC_MPROC_SIGNAL_SMP2P

					     IRQ_TYPE_EDGE_RISING>;

		mboxes = <&ipcc IPCC_CLIENT_MPSS

				IPCC_MPROC_SIGNAL_SMP2P>;



		qcom,local-pid = <0>;

		qcom,remote-pid = <1>;



		modem_smp2p_out: master-kernel {

			qcom,entry-name = "master-kernel";

			#qcom,smem-state-cells = <1>;

		};



		modem_smp2p_in: slave-kernel {

			qcom,entry-name = "slave-kernel";

			interrupt-controller;

			#interrupt-cells = <2>;

		};



		ipa_smp2p_out: ipa-ap-to-modem {

			qcom,entry-name = "ipa";

			#qcom,smem-state-cells = <1>;

		};



		ipa_smp2p_in: ipa-modem-to-ap {

			qcom,entry-name = "ipa";

			interrupt-controller;

			#interrupt-cells = <2>;

		};

	};



	smp2p-wpss {

		compatible = "qcom,smp2p";

		qcom,smem = <617>, <616>;

		interrupts-extended = <&ipcc IPCC_CLIENT_WPSS

					     IPCC_MPROC_SIGNAL_SMP2P

					     IRQ_TYPE_EDGE_RISING>;

		mboxes = <&ipcc IPCC_CLIENT_WPSS

				IPCC_MPROC_SIGNAL_SMP2P>;



		qcom,local-pid = <0>;

		qcom,remote-pid = <13>;



		wpss_smp2p_out: master-kernel {

			qcom,entry-name = "master-kernel";

			#qcom,smem-state-cells = <1>;

		};



		wpss_smp2p_in: slave-kernel {

			qcom,entry-name = "slave-kernel";

			interrupt-controller;

			#interrupt-cells = <2>;

		};

	};



	pmu {

		compatible = "arm,armv8-pmuv3";

		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
@@ -333,6 +453,12 @@ uart5: serial@994000 { 
			};

		};



		tcsr_mutex: hwlock@1f40000 {

			compatible = "qcom,tcsr-mutex", "syscon";

			reg = <0 0x01f40000 0 0x40000>;

			#hwlock-cells = <1>;

		};



		lpasscc: lpasscc@3000000 {

			compatible = "qcom,sc7280-lpasscc";

			reg = <0 0x03000000 0 0x40>,
@@ -896,6 +1022,12 @@ pdc: interrupt-controller@b220000 { 
			interrupt-controller;

		};



		pdc_reset: reset-controller@b5e0000 {

			compatible = "qcom,sc7280-pdc-global";

			reg = <0 0x0b5e0000 0 0x20000>;

			#reset-cells = <1>;

		};



		tsens0: thermal-sensor@c263000 {

			compatible = "qcom,sc7280-tsens","qcom,tsens-v2";

			reg = <0 0x0c263000 0 0x1ff>, /* TM */
@@ -918,6 +1050,12 @@ tsens1: thermal-sensor@c265000 { 
			#thermal-sensor-cells = <1>;

		};



		aoss_reset: reset-controller@c2a0000 {

			compatible = "qcom,sc7280-aoss-cc", "qcom,sdm845-aoss-cc";

			reg = <0 0x0c2a0000 0 0x31000>;

			#reset-cells = <1>;

		};



		aoss_qmp: power-controller@c300000 {

			compatible = "qcom,sc7280-aoss-qmp";

			reg = <0 0x0c300000 0 0x100000>;