Commit c46c3ddf authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/sw: prepare for the sharing of constructors between implementations 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent ef8d4781

drivers/gpu/drm/nouveau/core/engine/device/nv04.c

+2 −2
Original line number Diff line number Diff line
@@ -58,7 +58,7 @@ nv04_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv04_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv04_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv04_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv04_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		break;
@@ -76,7 +76,7 @@ nv04_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv04_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv04_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv04_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv04_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		break;

drivers/gpu/drm/nouveau/core/engine/device/nv10.c

+7 −7
Original line number Diff line number Diff line
@@ -77,7 +77,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv10_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		break;
@@ -96,7 +96,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv10_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		break;
@@ -115,7 +115,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv10_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		break;
@@ -134,7 +134,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv10_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		break;
@@ -153,7 +153,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		break;
@@ -172,7 +172,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		break;
@@ -191,7 +191,7 @@ nv10_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv10_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		break;

drivers/gpu/drm/nouveau/core/engine/device/nv20.c

+4 −4
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ nv20_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv20_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		break;
@@ -80,7 +80,7 @@ nv20_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv25_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		break;
@@ -99,7 +99,7 @@ nv20_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv25_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		break;
@@ -118,7 +118,7 @@ nv20_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv2a_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		break;

drivers/gpu/drm/nouveau/core/engine/device/nv30.c

+5 −5
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ nv30_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv30_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		break;
@@ -80,7 +80,7 @@ nv30_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv35_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

		break;
@@ -99,7 +99,7 @@ nv30_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv30_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv31_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -119,7 +119,7 @@ nv30_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv35_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv31_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -139,7 +139,7 @@ nv30_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv17_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv34_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv31_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;

drivers/gpu/drm/nouveau/core/engine/device/nv40.c

+16 −16
Original line number Diff line number Diff line
@@ -64,7 +64,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -85,7 +85,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv41_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -106,7 +106,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv41_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -127,7 +127,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv41_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -148,7 +148,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -169,7 +169,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv41_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -190,7 +190,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv41_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -211,7 +211,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv41_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -232,7 +232,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -253,7 +253,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -274,7 +274,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -295,7 +295,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -316,7 +316,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -337,7 +337,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -358,7 +358,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;
@@ -379,7 +379,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VM     ] = &nv44_vmmgr_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nv40_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nv10_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nv40_graph_oclass;

		device->oclass[NVDEV_ENGINE_MPEG   ] = &nv40_mpeg_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nv04_disp_oclass;