Commit c69fc3d0 authored by Aric Cyr's avatar Aric Cyr Committed by Alex Deucher
Browse files

drm/amd/display: Reduce CPU busy-waiting for long delays 



[WHY]
udelay should not be used for long waits since it keeps CPU active,
wasting power.

[HOW]
Use fsleep where acceptable to allow CPU cores to be parked by the scheduler.

Reviewed-by: default avatarWenjing Liu <Wenjing.Liu@amd.com>
Acked-by: default avatarQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: default avatarAric Cyr <aric.cyr@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b4ceeffd

drivers/gpu/drm/amd/display/dc/dce/dce_aux.c

+2 −7
Original line number Diff line number Diff line
@@ -832,15 +832,10 @@ bool dce_aux_transfer_with_retries(struct ddc_service *ddc, 
									LOG_FLAG_I2cAux_DceAux,

									"dce_aux_transfer_with_retries: payload->defer_delay=%u",

									payload->defer_delay);

						if (payload->defer_delay > 1) {

							msleep(payload->defer_delay);

							defer_time_in_ms += payload->defer_delay;

						} else if (payload->defer_delay <= 1) {

							udelay(payload->defer_delay * 1000);

						fsleep(payload->defer_delay * 1000);

						defer_time_in_ms += payload->defer_delay;

					}

				}

				}

				break;

			case AUX_TRANSACTION_REPLY_I2C_OVER_AUX_NACK:

				DC_TRACE_LEVEL_MESSAGE(DAL_TRACE_LEVEL_INFORMATION,

drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c

+1 −1
Original line number Diff line number Diff line
@@ -586,7 +586,7 @@ static void dcn10_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable, bool wait) 
				if (state == PSR_STATE0)

					break;

			}

			udelay(500);

			fsleep(500);

		}



		/* assert if max retry hit */

drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c

+1 −1
Original line number Diff line number Diff line
@@ -215,7 +215,7 @@ static void dmub_psr_enable(struct dmub_psr *dmub, bool enable, bool wait, uint8 
					break;

			}



			udelay(500);

			fsleep(500);

		}



		/* assert if max retry hit */

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

+2 −2
Original line number Diff line number Diff line
@@ -1153,7 +1153,7 @@ static bool poll_for_allocation_change_trigger(struct dc_link *link) 
			break;

		}



		msleep(5);

		fsleep(5000);

	}



	if (result == ACT_FAILED) {
@@ -1640,7 +1640,7 @@ static bool write_128b_132b_sst_payload_allocation_table( 
			}

		}

		retries++;

		msleep(5);

		fsleep(5000);

	}



	if (!result && retries == max_retries) {

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c

+4 −4
Original line number Diff line number Diff line
@@ -1005,7 +1005,7 @@ static enum dc_status wake_up_aux_channel(struct dc_link *link) 
		 * signal and may need up to 1 ms before being able to reply.

		 */

		if (status != DC_OK || dpcd_power_state == DP_SET_POWER_D3) {

			udelay(1000);

			fsleep(1000);

			aux_channel_retry_cnt++;

		}

	}
@@ -2121,7 +2121,7 @@ static bool dp_verify_link_cap( 


		if (status == LINK_TRAINING_SUCCESS) {

			success = true;

			udelay(1000);

			fsleep(1000);

			if (dc_link_dp_read_hpd_rx_irq_data(link, &irq_data) == DC_OK &&

					dc_link_check_link_loss_status(

							link,
@@ -2171,7 +2171,7 @@ bool dp_verify_link_cap_with_retries( 
			success = true;

			break;

		}

		msleep(10);

		fsleep(10 * 1000);

	}



	dp_trace_lt_fail_count_update(link, fail_count, true);
@@ -2231,7 +2231,7 @@ bool dc_link_is_dp_sink_present(struct dc_link *link) 
		gpio_result = dal_gpio_get_value(ddc->pin_clock, &clock_pin);

		ASSERT(gpio_result == GPIO_RESULT_OK);

		if (clock_pin)

			udelay(1000);

			fsleep(1000);

		else

			break;

	} while (retry++ < 3);