Commit c6dab724 authored by Fabrizio Lamarque's avatar Fabrizio Lamarque Committed by Jonathan Cameron
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dt-bindings: iio: ad7192: Add mandatory reference voltage source

Add required reference voltage (VRef) supply regulator.

AD7192 requires three independent voltage sources: DVdd, AVdd and VRef
(on REFINx pin pairs).

Fixes: b581f748cce0 ("staging: iio: adc: ad7192: move out of staging")
Signed-off-by: Fabrizio Lamarque <fl.scratchpad@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Cc: <Stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20230530075311.400686-5-fl.scratchpad@gmail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
parent f7d9e21d
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+5 −0
Original line number Diff line number Diff line
@@ -47,6 +47,9 @@ properties:
  avdd-supply:
    description: AVdd voltage supply

  vref-supply:
    description: VRef voltage supply

  adi,rejection-60-Hz-enable:
    description: |
      This bit enables a notch at 60 Hz when the first notch of the sinc
@@ -89,6 +92,7 @@ required:
  - interrupts
  - dvdd-supply
  - avdd-supply
  - vref-supply
  - spi-cpol
  - spi-cpha

@@ -115,6 +119,7 @@ examples:
            interrupt-parent = <&gpio>;
            dvdd-supply = <&dvdd>;
            avdd-supply = <&avdd>;
            vref-supply = <&vref>;

            adi,refin2-pins-enable;
            adi,rejection-60-Hz-enable;