Commit c75b1fdd authored by Michael Walle's avatar Michael Walle Committed by Greg Kroah-Hartman
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dt-bindings: serial: lpuart: add ls1028a compatibility



Add the LS1028A SoC compatibility string to the lpuart devicetree
bindings documentation.

Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200307091302.14881-1-michael@walle.cc


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent e33253f3
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+6 −4
Original line number Original line Diff line number Diff line
@@ -6,6 +6,8 @@ Required properties:
    on Vybrid vf610 SoC with 8-bit register organization
    on Vybrid vf610 SoC with 8-bit register organization
  - "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated
  - "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated
    on LS1021A SoC with 32-bit big-endian register organization
    on LS1021A SoC with 32-bit big-endian register organization
  - "fsl,ls1028a-lpuart" for lpuart compatible with the one integrated
    on LS1028A SoC with 32-bit little-endian register organization
  - "fsl,imx7ulp-lpuart" for lpuart compatible with the one integrated
  - "fsl,imx7ulp-lpuart" for lpuart compatible with the one integrated
    on i.MX7ULP SoC with 32-bit little-endian register organization
    on i.MX7ULP SoC with 32-bit little-endian register organization
  - "fsl,imx8qxp-lpuart" for lpuart compatible with the one integrated
  - "fsl,imx8qxp-lpuart" for lpuart compatible with the one integrated
@@ -15,10 +17,10 @@ Required properties:
- reg : Address and length of the register set for the device
- reg : Address and length of the register set for the device
- interrupts : Should contain uart interrupt
- interrupts : Should contain uart interrupt
- clocks : phandle + clock specifier pairs, one for each entry in clock-names
- clocks : phandle + clock specifier pairs, one for each entry in clock-names
- clock-names : For vf610/ls1021a/imx7ulp, "ipg" clock is for uart bus/baud
- clock-names : For vf610/ls1021a/ls1028a/imx7ulp, "ipg" clock is for uart
  clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used to access
  bus/baud clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used
  lpuart controller registers, it also requires "baud" clock for module to
  to access lpuart controller registers, it also requires "baud" clock for
  receive/transmit data.
  module to receive/transmit data.


Optional properties:
Optional properties:
- dmas: A list of two dma specifiers, one for each entry in dma-names.
- dmas: A list of two dma specifiers, one for each entry in dma-names.