Loading drivers/net/wireless/wl12xx/wl1271_boot.c +4 −6 Original line number Diff line number Diff line Loading @@ -471,20 +471,19 @@ int wl1271_boot(struct wl1271 *wl) { int ret = 0; u32 tmp, clk, pause; int ref_clock = wl->ref_clock; wl1271_boot_hw_version(wl); if (ref_clock == 0 || ref_clock == 2 || ref_clock == 4) if (wl->ref_clock == 0 || wl->ref_clock == 2 || wl->ref_clock == 4) /* ref clk: 19.2/38.4/38.4-XTAL */ clk = 0x3; else if (ref_clock == 1 || ref_clock == 3) else if (wl->ref_clock == 1 || wl->ref_clock == 3) /* ref clk: 26/52 */ clk = 0x5; else return -EINVAL; if (ref_clock != 0) { if (wl->ref_clock != 0) { u16 val; /* Set clock type (open drain) */ val = wl1271_top_reg_read(wl, OCP_REG_CLK_TYPE); Loading Loading @@ -529,8 +528,7 @@ int wl1271_boot(struct wl1271 *wl) wl1271_debug(DEBUG_BOOT, "clk2 0x%x", clk); /* 2 */ clk |= (ref_clock << 1) << 4; clk |= (wl->ref_clock << 1) << 4; wl1271_write32(wl, DRPW_SCRATCH_START, clk); wl1271_set_partition(wl, &part_table[PART_WORK]); Loading include/linux/wl12xx.h +8 −0 Original line number Diff line number Diff line Loading @@ -24,6 +24,14 @@ #ifndef _LINUX_WL12XX_H #define _LINUX_WL12XX_H /* The board reference clock values */ enum { WL12XX_REFCLOCK_19 = 0, /* 19.2 MHz */ WL12XX_REFCLOCK_26 = 1, /* 26 MHz */ WL12XX_REFCLOCK_38 = 2, /* 38.4 MHz */ WL12XX_REFCLOCK_54 = 3, /* 54 MHz */ }; struct wl12xx_platform_data { void (*set_power)(bool enable); /* SDIO only: IRQ number if WLAN_IRQ line is used, 0 for SDIO IRQs */ Loading Loading
drivers/net/wireless/wl12xx/wl1271_boot.c +4 −6 Original line number Diff line number Diff line Loading @@ -471,20 +471,19 @@ int wl1271_boot(struct wl1271 *wl) { int ret = 0; u32 tmp, clk, pause; int ref_clock = wl->ref_clock; wl1271_boot_hw_version(wl); if (ref_clock == 0 || ref_clock == 2 || ref_clock == 4) if (wl->ref_clock == 0 || wl->ref_clock == 2 || wl->ref_clock == 4) /* ref clk: 19.2/38.4/38.4-XTAL */ clk = 0x3; else if (ref_clock == 1 || ref_clock == 3) else if (wl->ref_clock == 1 || wl->ref_clock == 3) /* ref clk: 26/52 */ clk = 0x5; else return -EINVAL; if (ref_clock != 0) { if (wl->ref_clock != 0) { u16 val; /* Set clock type (open drain) */ val = wl1271_top_reg_read(wl, OCP_REG_CLK_TYPE); Loading Loading @@ -529,8 +528,7 @@ int wl1271_boot(struct wl1271 *wl) wl1271_debug(DEBUG_BOOT, "clk2 0x%x", clk); /* 2 */ clk |= (ref_clock << 1) << 4; clk |= (wl->ref_clock << 1) << 4; wl1271_write32(wl, DRPW_SCRATCH_START, clk); wl1271_set_partition(wl, &part_table[PART_WORK]); Loading
include/linux/wl12xx.h +8 −0 Original line number Diff line number Diff line Loading @@ -24,6 +24,14 @@ #ifndef _LINUX_WL12XX_H #define _LINUX_WL12XX_H /* The board reference clock values */ enum { WL12XX_REFCLOCK_19 = 0, /* 19.2 MHz */ WL12XX_REFCLOCK_26 = 1, /* 26 MHz */ WL12XX_REFCLOCK_38 = 2, /* 38.4 MHz */ WL12XX_REFCLOCK_54 = 3, /* 54 MHz */ }; struct wl12xx_platform_data { void (*set_power)(bool enable); /* SDIO only: IRQ number if WLAN_IRQ line is used, 0 for SDIO IRQs */ Loading