Commit ca41ec1b authored by Robert Marko's avatar Robert Marko Committed by Bjorn Andersson
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clk: qcom: ipq8074: fix NSS core PLL-s 



Like in IPQ6018 the NSS related Alpha PLL-s require initial configuration
to work.

So, obtain the regmap that is required for the Alpha PLL configuration
and thus utilize the qcom_cc_really_probe() as we already have the regmap.
Then utilize the Alpha PLL configs from the downstream QCA 5.4 based
kernel to configure them.

This fixes the UBI32 and NSS crypto PLL-s failing to get enabled by the
kernel.

Fixes: b8e7e519 ("clk: qcom: ipq8074: add remaining PLL’s")
Signed-off-by: default avatarRobert Marko <robimarko@gmail.com>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220515210048.483898-1-robimarko@gmail.com
parent 05eed099

drivers/clk/qcom/gcc-ipq8074.c

+38 −1
Original line number Diff line number Diff line
@@ -4371,6 +4371,33 @@ static struct clk_branch gcc_pcie0_axi_s_bridge_clk = { 
	},

};



static const struct alpha_pll_config ubi32_pll_config = {

	.l = 0x4e,

	.config_ctl_val = 0x200d4aa8,

	.config_ctl_hi_val = 0x3c2,

	.main_output_mask = BIT(0),

	.aux_output_mask = BIT(1),

	.pre_div_val = 0x0,

	.pre_div_mask = BIT(12),

	.post_div_val = 0x0,

	.post_div_mask = GENMASK(9, 8),

};



static const struct alpha_pll_config nss_crypto_pll_config = {

	.l = 0x3e,

	.alpha = 0x0,

	.alpha_hi = 0x80,

	.config_ctl_val = 0x4001055b,

	.main_output_mask = BIT(0),

	.pre_div_val = 0x0,

	.pre_div_mask = GENMASK(14, 12),

	.post_div_val = 0x1 << 8,

	.post_div_mask = GENMASK(11, 8),

	.vco_mask = GENMASK(21, 20),

	.vco_val = 0x0,

	.alpha_en_mask = BIT(24),

};



static struct clk_hw *gcc_ipq8074_hws[] = {

	&gpll0_out_main_div2.hw,

	&gpll6_out_main_div2.hw,
@@ -4772,7 +4799,17 @@ static const struct qcom_cc_desc gcc_ipq8074_desc = { 


static int gcc_ipq8074_probe(struct platform_device *pdev)

{

	return qcom_cc_probe(pdev, &gcc_ipq8074_desc);

	struct regmap *regmap;



	regmap = qcom_cc_map(pdev, &gcc_ipq8074_desc);

	if (IS_ERR(regmap))

		return PTR_ERR(regmap);



	clk_alpha_pll_configure(&ubi32_pll_main, regmap, &ubi32_pll_config);

	clk_alpha_pll_configure(&nss_crypto_pll_main, regmap,

				&nss_crypto_pll_config);



	return qcom_cc_really_probe(pdev, &gcc_ipq8074_desc, regmap);

}



static struct platform_driver gcc_ipq8074_driver = {