Loading arch/arm/boot/dts/omap3.dtsi +21 −0 Original line number Diff line number Diff line Loading @@ -90,5 +90,26 @@ uart4: serial@0x49042000 { ti,hwmods = "uart4"; clock-frequency = <48000000>; }; i2c1: i2c@48070000 { compatible = "ti,omap3-i2c"; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c1"; }; i2c2: i2c@48072000 { compatible = "ti,omap3-i2c"; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c2"; }; i2c3: i2c@48060000 { compatible = "ti,omap3-i2c"; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c3"; }; }; }; Loading
arch/arm/boot/dts/omap3.dtsi +21 −0 Original line number Diff line number Diff line Loading @@ -90,5 +90,26 @@ uart4: serial@0x49042000 { ti,hwmods = "uart4"; clock-frequency = <48000000>; }; i2c1: i2c@48070000 { compatible = "ti,omap3-i2c"; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c1"; }; i2c2: i2c@48072000 { compatible = "ti,omap3-i2c"; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c2"; }; i2c3: i2c@48060000 { compatible = "ti,omap3-i2c"; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c3"; }; }; };