Loading .mailmap +1 −0 Original line number Original line Diff line number Diff line Loading @@ -21,6 +21,7 @@ Andrey Ryabinin <ryabinin.a.a@gmail.com> <a.ryabinin@samsung.com> Andrew Morton <akpm@linux-foundation.org> Andrew Morton <akpm@linux-foundation.org> Andrew Vasquez <andrew.vasquez@qlogic.com> Andrew Vasquez <andrew.vasquez@qlogic.com> Andy Adamson <andros@citi.umich.edu> Andy Adamson <andros@citi.umich.edu> Antonio Ospite <ao2@ao2.it> <ao2@amarulasolutions.com> Archit Taneja <archit@ti.com> Archit Taneja <archit@ti.com> Arnaud Patard <arnaud.patard@rtp-net.org> Arnaud Patard <arnaud.patard@rtp-net.org> Arnd Bergmann <arnd@arndb.de> Arnd Bergmann <arnd@arndb.de> Loading Documentation/Intel-IOMMU.txt +1 −1 Original line number Original line Diff line number Diff line Loading @@ -3,7 +3,7 @@ Linux IOMMU Support The architecture spec can be obtained from the below location. The architecture spec can be obtained from the below location. http://www.intel.com/technology/virtualization/ http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf This guide gives a quick cheat sheet for some basic understanding. This guide gives a quick cheat sheet for some basic understanding. Loading Documentation/cgroup-v2.txt +5 −1 Original line number Original line Diff line number Diff line Loading @@ -7,7 +7,7 @@ This is the authoritative documentation on the design, interface and conventions of cgroup v2. It describes all userland-visible aspects conventions of cgroup v2. It describes all userland-visible aspects of cgroup including core and specific controller behaviors. All of cgroup including core and specific controller behaviors. All future changes must be reflected in this document. Documentation for future changes must be reflected in this document. Documentation for v1 is available under Documentation/cgroup-legacy/. v1 is available under Documentation/cgroup-v1/. CONTENTS CONTENTS Loading Loading @@ -843,6 +843,10 @@ PAGE_SIZE multiple when read back. Amount of memory used to cache filesystem data, Amount of memory used to cache filesystem data, including tmpfs and shared memory. including tmpfs and shared memory. sock Amount of memory used in network transmission buffers file_mapped file_mapped Amount of cached filesystem data mapped with mmap() Amount of cached filesystem data mapped with mmap() Loading Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt +1 −1 Original line number Original line Diff line number Diff line Loading @@ -30,7 +30,7 @@ that they are defined using standard clock bindings with following clock-output-names: clock-output-names: - "xin24m" - crystal input - required, - "xin24m" - crystal input - required, - "ext_i2s" - external I2S clock - optional, - "ext_i2s" - external I2S clock - optional, - "ext_gmac" - external GMAC clock - optional - "rmii_clkin" - external EMAC clock - optional Example: Clock controller node: Example: Clock controller node: Loading Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt +2 −3 Original line number Original line Diff line number Diff line Loading @@ -24,9 +24,8 @@ Main node required properties: 1 = edge triggered 1 = edge triggered 4 = level triggered 4 = level triggered Cells 4 and beyond are reserved for future use. When the 1st cell Cells 4 and beyond are reserved for future use and must have a value has a value of 0 or 1, cells 4 and beyond act as padding, and may be of 0 if present. ignored. It is recommended that padding cells have a value of 0. - reg : Specifies base physical address(s) and size of the GIC - reg : Specifies base physical address(s) and size of the GIC registers, in the following order: registers, in the following order: Loading Loading
.mailmap +1 −0 Original line number Original line Diff line number Diff line Loading @@ -21,6 +21,7 @@ Andrey Ryabinin <ryabinin.a.a@gmail.com> <a.ryabinin@samsung.com> Andrew Morton <akpm@linux-foundation.org> Andrew Morton <akpm@linux-foundation.org> Andrew Vasquez <andrew.vasquez@qlogic.com> Andrew Vasquez <andrew.vasquez@qlogic.com> Andy Adamson <andros@citi.umich.edu> Andy Adamson <andros@citi.umich.edu> Antonio Ospite <ao2@ao2.it> <ao2@amarulasolutions.com> Archit Taneja <archit@ti.com> Archit Taneja <archit@ti.com> Arnaud Patard <arnaud.patard@rtp-net.org> Arnaud Patard <arnaud.patard@rtp-net.org> Arnd Bergmann <arnd@arndb.de> Arnd Bergmann <arnd@arndb.de> Loading
Documentation/Intel-IOMMU.txt +1 −1 Original line number Original line Diff line number Diff line Loading @@ -3,7 +3,7 @@ Linux IOMMU Support The architecture spec can be obtained from the below location. The architecture spec can be obtained from the below location. http://www.intel.com/technology/virtualization/ http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf This guide gives a quick cheat sheet for some basic understanding. This guide gives a quick cheat sheet for some basic understanding. Loading
Documentation/cgroup-v2.txt +5 −1 Original line number Original line Diff line number Diff line Loading @@ -7,7 +7,7 @@ This is the authoritative documentation on the design, interface and conventions of cgroup v2. It describes all userland-visible aspects conventions of cgroup v2. It describes all userland-visible aspects of cgroup including core and specific controller behaviors. All of cgroup including core and specific controller behaviors. All future changes must be reflected in this document. Documentation for future changes must be reflected in this document. Documentation for v1 is available under Documentation/cgroup-legacy/. v1 is available under Documentation/cgroup-v1/. CONTENTS CONTENTS Loading Loading @@ -843,6 +843,10 @@ PAGE_SIZE multiple when read back. Amount of memory used to cache filesystem data, Amount of memory used to cache filesystem data, including tmpfs and shared memory. including tmpfs and shared memory. sock Amount of memory used in network transmission buffers file_mapped file_mapped Amount of cached filesystem data mapped with mmap() Amount of cached filesystem data mapped with mmap() Loading
Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt +1 −1 Original line number Original line Diff line number Diff line Loading @@ -30,7 +30,7 @@ that they are defined using standard clock bindings with following clock-output-names: clock-output-names: - "xin24m" - crystal input - required, - "xin24m" - crystal input - required, - "ext_i2s" - external I2S clock - optional, - "ext_i2s" - external I2S clock - optional, - "ext_gmac" - external GMAC clock - optional - "rmii_clkin" - external EMAC clock - optional Example: Clock controller node: Example: Clock controller node: Loading
Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt +2 −3 Original line number Original line Diff line number Diff line Loading @@ -24,9 +24,8 @@ Main node required properties: 1 = edge triggered 1 = edge triggered 4 = level triggered 4 = level triggered Cells 4 and beyond are reserved for future use. When the 1st cell Cells 4 and beyond are reserved for future use and must have a value has a value of 0 or 1, cells 4 and beyond act as padding, and may be of 0 if present. ignored. It is recommended that padding cells have a value of 0. - reg : Specifies base physical address(s) and size of the GIC - reg : Specifies base physical address(s) and size of the GIC registers, in the following order: registers, in the following order: Loading