Loading arch/arm/include/asm/cputype.h +1 −0 Original line number Diff line number Diff line Loading @@ -72,6 +72,7 @@ #define ARM_CPU_PART_CORTEX_A15 0xC0F0 #define ARM_CPU_PART_CORTEX_A7 0xC070 #define ARM_CPU_PART_CORTEX_A12 0xC0D0 #define ARM_CPU_PART_CORTEX_A17 0xC0E0 #define ARM_CPU_XSCALE_ARCH_MASK 0xe000 #define ARM_CPU_XSCALE_ARCH_V1 0x2000 Loading arch/arm/mm/proc-v7.S +11 −0 Original line number Diff line number Diff line Loading @@ -216,6 +216,7 @@ __v7_cr7mp_setup: __v7_ca7mp_setup: __v7_ca12mp_setup: __v7_ca15mp_setup: __v7_ca17mp_setup: mov r10, #0 1: #ifdef CONFIG_SMP Loading Loading @@ -526,6 +527,16 @@ __v7_ca15mp_proc_info: __v7_proc __v7_ca15mp_setup .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info /* * ARM Ltd. Cortex A17 processor. */ .type __v7_ca17mp_proc_info, #object __v7_ca17mp_proc_info: .long 0x410fc0e0 .long 0xff0ffff0 __v7_proc __v7_ca17mp_setup .size __v7_ca17mp_proc_info, . - __v7_ca17mp_proc_info /* * Qualcomm Inc. Krait processors. */ Loading Loading
arch/arm/include/asm/cputype.h +1 −0 Original line number Diff line number Diff line Loading @@ -72,6 +72,7 @@ #define ARM_CPU_PART_CORTEX_A15 0xC0F0 #define ARM_CPU_PART_CORTEX_A7 0xC070 #define ARM_CPU_PART_CORTEX_A12 0xC0D0 #define ARM_CPU_PART_CORTEX_A17 0xC0E0 #define ARM_CPU_XSCALE_ARCH_MASK 0xe000 #define ARM_CPU_XSCALE_ARCH_V1 0x2000 Loading
arch/arm/mm/proc-v7.S +11 −0 Original line number Diff line number Diff line Loading @@ -216,6 +216,7 @@ __v7_cr7mp_setup: __v7_ca7mp_setup: __v7_ca12mp_setup: __v7_ca15mp_setup: __v7_ca17mp_setup: mov r10, #0 1: #ifdef CONFIG_SMP Loading Loading @@ -526,6 +527,16 @@ __v7_ca15mp_proc_info: __v7_proc __v7_ca15mp_setup .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info /* * ARM Ltd. Cortex A17 processor. */ .type __v7_ca17mp_proc_info, #object __v7_ca17mp_proc_info: .long 0x410fc0e0 .long 0xff0ffff0 __v7_proc __v7_ca17mp_setup .size __v7_ca17mp_proc_info, . - __v7_ca17mp_proc_info /* * Qualcomm Inc. Krait processors. */ Loading