Loading arch/mips/include/uapi/asm/swab.h +6 −6 Original line number Diff line number Diff line Loading @@ -13,7 +13,7 @@ #define __SWAB_64_THRU_32__ #ifdef CONFIG_CPU_MIPSR2 #if defined(__mips_isa_rev) && (__mips_isa_rev >= 2) static inline __attribute_const__ __u16 __arch_swab16(__u16 x) { Loading @@ -39,10 +39,10 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x) #define __arch_swab32 __arch_swab32 /* * Having already checked for CONFIG_CPU_MIPSR2, enable the * optimized version for 64-bit kernel on r2 CPUs. * Having already checked for MIPS R2, enable the optimized version for * 64-bit kernel on r2 CPUs. */ #ifdef CONFIG_64BIT #ifdef __mips64 static inline __attribute_const__ __u64 __arch_swab64(__u64 x) { __asm__( Loading @@ -54,6 +54,6 @@ static inline __attribute_const__ __u64 __arch_swab64(__u64 x) return x; } #define __arch_swab64 __arch_swab64 #endif /* CONFIG_64BIT */ #endif /* CONFIG_CPU_MIPSR2 */ #endif /* __mips64 */ #endif /* MIPS R2 or newer */ #endif /* _ASM_SWAB_H */ Loading
arch/mips/include/uapi/asm/swab.h +6 −6 Original line number Diff line number Diff line Loading @@ -13,7 +13,7 @@ #define __SWAB_64_THRU_32__ #ifdef CONFIG_CPU_MIPSR2 #if defined(__mips_isa_rev) && (__mips_isa_rev >= 2) static inline __attribute_const__ __u16 __arch_swab16(__u16 x) { Loading @@ -39,10 +39,10 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x) #define __arch_swab32 __arch_swab32 /* * Having already checked for CONFIG_CPU_MIPSR2, enable the * optimized version for 64-bit kernel on r2 CPUs. * Having already checked for MIPS R2, enable the optimized version for * 64-bit kernel on r2 CPUs. */ #ifdef CONFIG_64BIT #ifdef __mips64 static inline __attribute_const__ __u64 __arch_swab64(__u64 x) { __asm__( Loading @@ -54,6 +54,6 @@ static inline __attribute_const__ __u64 __arch_swab64(__u64 x) return x; } #define __arch_swab64 __arch_swab64 #endif /* CONFIG_64BIT */ #endif /* CONFIG_CPU_MIPSR2 */ #endif /* __mips64 */ #endif /* MIPS R2 or newer */ #endif /* _ASM_SWAB_H */