Commit d05095b5 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/gr/gf100-: make global pagepool actually global 



This was thought to be per-channel initially - it's not.  The backing
pages for the VMM mappings are shared for all channels.

- switches to more straight-forward patch interfaces
- prepares for sub-context support

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
parent ca081fff

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c

+21 −11
Original line number Diff line number Diff line
@@ -991,6 +991,18 @@ gf100_grctx_pack_tpc[] = { 
 * PGRAPH context implementation

 ******************************************************************************/



void

gf100_grctx_patch_wr32(struct gf100_gr_chan *chan, u32 addr, u32 data)

{

	if (unlikely(!chan->mmio)) {

		nvkm_wr32(chan->gr->base.engine.subdev.device, addr, data);

		return;

	}



	nvkm_wo32(chan->mmio, chan->mmio_nr++ * 4, addr);

	nvkm_wo32(chan->mmio, chan->mmio_nr++ * 4, data);

}



int

gf100_grctx_mmio_data(struct gf100_grctx *info, u32 size, u32 align, bool priv)

{
@@ -1050,15 +1062,12 @@ gf100_grctx_generate_bundle(struct gf100_grctx *info) 
}



void

gf100_grctx_generate_pagepool(struct gf100_grctx *info)

gf100_grctx_generate_pagepool(struct gf100_gr_chan *chan, u64 addr)

{

	const struct gf100_grctx_func *grctx = info->gr->func->grctx;

	const int s = 8;

	const int b = mmio_vram(info, grctx->pagepool_size, (1 << s), true);

	mmio_refn(info, 0x40800c, 0x00000000, s, b);

	mmio_wr32(info, 0x408010, 0x80000000);

	mmio_refn(info, 0x419004, 0x00000000, s, b);

	mmio_wr32(info, 0x419008, 0x00000000);

	gf100_grctx_patch_wr32(chan, 0x40800c, addr >> 8);

	gf100_grctx_patch_wr32(chan, 0x408010, 0x80000000);

	gf100_grctx_patch_wr32(chan, 0x419004, addr >> 8);

	gf100_grctx_patch_wr32(chan, 0x419008, 0x00000000);

}



void
@@ -1362,8 +1371,9 @@ gf100_grctx_generate_floorsweep(struct gf100_gr *gr) 
}



void

gf100_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info)

gf100_grctx_generate_main(struct gf100_gr_chan *chan, struct gf100_grctx *info)

{

	struct gf100_gr *gr = chan->gr;

	struct nvkm_device *device = gr->base.engine.subdev.device;

	const struct gf100_grctx_func *grctx = gr->func->grctx;

	u32 idle_timeout;
@@ -1385,7 +1395,7 @@ gf100_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info) 


	idle_timeout = nvkm_mask(device, 0x404154, 0xffffffff, 0x00000000);



	grctx->pagepool(info);

	grctx->pagepool(chan, chan->pagepool->addr);

	grctx->bundle(info);

	grctx->attrib(info);

	if (grctx->patch_ltc)
@@ -1521,7 +1531,7 @@ gf100_grctx_generate(struct gf100_gr *gr, struct gf100_gr_chan *chan, struct nvk 
		);

	}



	grctx->main(gr, &info);

	grctx->main(chan, &info);



	/* Trigger a context unload by unsetting the "next channel valid" bit

	 * and faking a context switch interrupt.

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.h

+8 −7
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ struct gf100_grctx { 


int  gf100_grctx_mmio_data(struct gf100_grctx *, u32 size, u32 align, bool priv);

void gf100_grctx_mmio_item(struct gf100_grctx *, u32 addr, u32 data, int s, int);

void gf100_grctx_patch_wr32(struct gf100_gr_chan *, u32 addr, u32 data);



#define mmio_vram(a,b,c,d) gf100_grctx_mmio_data((a), (b), (c), (d))

#define mmio_refn(a,b,c,d,e) gf100_grctx_mmio_item((a), (b), (c), (d), (e))
@@ -23,7 +24,7 @@ void gf100_grctx_mmio_item(struct gf100_grctx *, u32 addr, u32 data, int s, int) 
struct gf100_grctx_func {

	void (*unkn88c)(struct gf100_gr *, bool on);

	/* main context generation function */

	void  (*main)(struct gf100_gr *, struct gf100_grctx *);

	void  (*main)(struct gf100_gr_chan *, struct gf100_grctx *);

	/* context-specific modify-on-first-load list generation function */

	void  (*unkn)(struct gf100_gr *);

	/* mmio context data */
@@ -43,7 +44,7 @@ struct gf100_grctx_func { 
	u32 bundle_min_gpm_fifo_depth;

	u32 bundle_token_limit;

	/* pagepool */

	void (*pagepool)(struct gf100_grctx *);

	void (*pagepool)(struct gf100_gr_chan *, u64 addr);

	u32 pagepool_size;

	/* attribute(/alpha) circular buffer */

	void (*attrib)(struct gf100_grctx *);
@@ -82,9 +83,9 @@ struct gf100_grctx_func { 


extern const struct gf100_grctx_func gf100_grctx;

int  gf100_grctx_generate(struct gf100_gr *, struct gf100_gr_chan *, struct nvkm_gpuobj *inst);

void gf100_grctx_generate_main(struct gf100_gr *, struct gf100_grctx *);

void gf100_grctx_generate_main(struct gf100_gr_chan *, struct gf100_grctx *);

void gf100_grctx_generate_bundle(struct gf100_grctx *);

void gf100_grctx_generate_pagepool(struct gf100_grctx *);

void gf100_grctx_generate_pagepool(struct gf100_gr_chan *, u64);

void gf100_grctx_generate_attrib(struct gf100_grctx *);

void gf100_grctx_generate_unkn(struct gf100_gr *);

void gf100_grctx_generate_floorsweep(struct gf100_gr *);
@@ -116,7 +117,7 @@ void gk104_grctx_generate_gpc_tpc_nr(struct gf100_gr *); 


extern const struct gf100_grctx_func gk20a_grctx;

void gk104_grctx_generate_bundle(struct gf100_grctx *);

void gk104_grctx_generate_pagepool(struct gf100_grctx *);

void gk104_grctx_generate_pagepool(struct gf100_gr_chan *, u64);

void gk104_grctx_generate_patch_ltc(struct gf100_grctx *);

void gk104_grctx_generate_unkn(struct gf100_gr *);

void gk104_grctx_generate_r418800(struct gf100_gr *);
@@ -129,7 +130,7 @@ extern const struct gf100_grctx_func gk208_grctx; 


extern const struct gf100_grctx_func gm107_grctx;

void gm107_grctx_generate_bundle(struct gf100_grctx *);

void gm107_grctx_generate_pagepool(struct gf100_grctx *);

void gm107_grctx_generate_pagepool(struct gf100_gr_chan *, u64);

void gm107_grctx_generate_attrib(struct gf100_grctx *);

void gm107_grctx_generate_sm_id(struct gf100_gr *, int, int, int);
@@ -143,7 +144,7 @@ void gm200_grctx_generate_r419a3c(struct gf100_gr *); 
extern const struct gf100_grctx_func gm20b_grctx;



extern const struct gf100_grctx_func gp100_grctx;

void gp100_grctx_generate_pagepool(struct gf100_grctx *);

void gp100_grctx_generate_pagepool(struct gf100_gr_chan *, u64);

void gp100_grctx_generate_smid_config(struct gf100_gr *);



extern const struct gf100_grctx_func gp102_grctx;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c

+3 −9
Original line number Diff line number Diff line
@@ -888,16 +888,10 @@ gk104_grctx_generate_bundle(struct gf100_grctx *info) 
}



void

gk104_grctx_generate_pagepool(struct gf100_grctx *info)

gk104_grctx_generate_pagepool(struct gf100_gr_chan *chan, u64 addr)

{

	const struct gf100_grctx_func *grctx = info->gr->func->grctx;

	const int s = 8;

	const int b = mmio_vram(info, grctx->pagepool_size, (1 << s), true);

	mmio_refn(info, 0x40800c, 0x00000000, s, b);

	mmio_wr32(info, 0x408010, 0x80000000);

	mmio_refn(info, 0x419004, 0x00000000, s, b);

	mmio_wr32(info, 0x419008, 0x00000000);

	mmio_wr32(info, 0x4064cc, 0x80000000);

	gf100_grctx_generate_pagepool(chan, addr);

	gf100_grctx_patch_wr32(chan, 0x4064cc, 0x80000000);

}



void

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk20a.c

+3 −2
Original line number Diff line number Diff line
@@ -25,8 +25,9 @@ 
#include <subdev/mc.h>



static void

gk20a_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info)

gk20a_grctx_generate_main(struct gf100_gr_chan *chan, struct gf100_grctx *info)

{

	struct gf100_gr *gr = chan->gr;

	struct nvkm_device *device = gr->base.engine.subdev.device;

	const struct gf100_grctx_func *grctx = gr->func->grctx;

	u32 idle_timeout;
@@ -60,7 +61,7 @@ gk20a_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info) 
	gf100_gr_wait_idle(gr);



	gf100_gr_icmd(gr, gr->bundle);

	grctx->pagepool(info);

	grctx->pagepool(chan, chan->pagepool->addr);

	grctx->bundle(info);

}

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c

+3 −10
Original line number Diff line number Diff line
@@ -892,17 +892,10 @@ gm107_grctx_generate_bundle(struct gf100_grctx *info) 
}



void

gm107_grctx_generate_pagepool(struct gf100_grctx *info)

gm107_grctx_generate_pagepool(struct gf100_gr_chan *chan, u64 addr)

{

	const struct gf100_grctx_func *grctx = info->gr->func->grctx;

	const int s = 8;

	const int b = mmio_vram(info, grctx->pagepool_size, (1 << s), true);

	mmio_refn(info, 0x40800c, 0x00000000, s, b);

	mmio_wr32(info, 0x408010, 0x80000000);

	mmio_refn(info, 0x419004, 0x00000000, s, b);

	mmio_wr32(info, 0x419008, 0x00000000);

	mmio_wr32(info, 0x4064cc, 0x80000000);

	mmio_wr32(info, 0x418e30, 0x80000000); /* guess at it being related */

	gk104_grctx_generate_pagepool(chan, addr);

	gf100_grctx_patch_wr32(chan, 0x418e30, 0x80000000);

}



void