Commit d6bdbcd8 authored by Serge Semin's avatar Serge Semin Committed by Bjorn Helgaas
Browse files

PCI: dwc: Move io_cfg_atu_shared to struct pcie_port

The io_cfg_atu_shared flag is set if there is an outbound iATU window used
for both config space accesses and IO port transfers.

Since the flag semantic is purely Root Port specific, it's not used in
either the DW PCIe common code or in the DW PCIe Endpoint driver. Move it
to the struct pcie_port and rename to cfg0_io_shared.

[bhelgaas: commit log]
Link: https://lore.kernel.org/r/20220624143428.8334-15-Sergey.Semin@baikalelectronics.ru


Signed-off-by: default avatarSerge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Reviewed-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
parent a37beefb
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+3 −3
Original line number Diff line number Diff line
@@ -492,7 +492,7 @@ static int dw_pcie_rd_other_conf(struct pci_bus *bus, unsigned int devfn,

	ret = pci_generic_config_read(bus, devfn, where, size, val);

	if (!ret && pci->io_cfg_atu_shared)
	if (!ret && pp->cfg0_io_shared)
		dw_pcie_prog_outbound_atu(pci, 0, PCIE_ATU_TYPE_IO, pp->io_base,
					  pp->io_bus_addr, pp->io_size);

@@ -508,7 +508,7 @@ static int dw_pcie_wr_other_conf(struct pci_bus *bus, unsigned int devfn,

	ret = pci_generic_config_write(bus, devfn, where, size, val);

	if (!ret && pci->io_cfg_atu_shared)
	if (!ret && pp->cfg0_io_shared)
		dw_pcie_prog_outbound_atu(pci, 0, PCIE_ATU_TYPE_IO, pp->io_base,
					  pp->io_bus_addr, pp->io_size);

@@ -627,7 +627,7 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
							  PCIE_ATU_TYPE_IO, pp->io_base,
							  pp->io_bus_addr, pp->io_size);
			else
				pci->io_cfg_atu_shared = true;
				pp->cfg0_io_shared = true;
		}

		if (pci->num_ob_windows <= atu_idx)
+1 −1
Original line number Diff line number Diff line
@@ -179,6 +179,7 @@ struct dw_pcie_host_ops {

struct pcie_port {
	bool			has_msi_ctrl:1;
	bool			cfg0_io_shared:1;
	u64			cfg0_base;
	void __iomem		*va_cfg0_base;
	u32			cfg0_size;
@@ -274,7 +275,6 @@ struct dw_pcie {
	int			link_gen;
	u8			n_fts[2];
	bool			iatu_unroll_enabled: 1;
	bool			io_cfg_atu_shared: 1;
};

#define to_dw_pcie_from_pp(port) container_of((port), struct dw_pcie, pp)