Commit d78071b4 authored by Pierre-Louis Bossart's avatar Pierre-Louis Bossart Committed by Vinod Koul
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soundwire: intel: add missing support for all clock stop modes



Deal with the BUS_RESET case, which is the default. The only change is
to add support for the exit sequence using the syncArm/syncGo mode for
the exit reset sequence.

Signed-off-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: default avatarBard Liao <yung-chuan.liao@linux.intel.com>
Link: https://lore.kernel.org/r/20200901150556.19432-5-yung-chuan.liao@linux.intel.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 857a7c42
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+39 −10
Original line number Original line Diff line number Diff line
@@ -1868,11 +1868,6 @@ static int intel_resume_runtime(struct device *dev)


		if (!clock_stop0) {
		if (!clock_stop0) {


			/*
			 * Re-initialize the IP since it was powered-off
			 */
			sdw_cdns_init(&sdw->cdns);

			/*
			/*
			 * make sure all Slaves are tagged as UNATTACHED and
			 * make sure all Slaves are tagged as UNATTACHED and
			 * provide reason for reinitialization
			 * provide reason for reinitialization
@@ -1880,20 +1875,54 @@ static int intel_resume_runtime(struct device *dev)


			status = SDW_UNATTACH_REQUEST_MASTER_RESET;
			status = SDW_UNATTACH_REQUEST_MASTER_RESET;
			sdw_clear_slave_status(bus, status);
			sdw_clear_slave_status(bus, status);

			ret = sdw_cdns_enable_interrupt(cdns, true);
			if (ret < 0) {
				dev_err(dev, "cannot enable interrupts during resume\n");
				return ret;
			}
			}


			/*
			 * follow recommended programming flows to avoid
			 * timeouts when gsync is enabled
			 */
			if (multi_link)
				intel_shim_sync_arm(sdw);

			/*
			 * Re-initialize the IP since it was powered-off
			 */
			sdw_cdns_init(&sdw->cdns);


		} else {
			ret = sdw_cdns_enable_interrupt(cdns, true);
			ret = sdw_cdns_enable_interrupt(cdns, true);
			if (ret < 0) {
			if (ret < 0) {
				dev_err(dev, "cannot enable interrupts during resume\n");
				dev_err(dev, "cannot enable interrupts during resume\n");
				return ret;
				return ret;
			}
			}
		}


		ret = sdw_cdns_clock_restart(cdns, !clock_stop0);
		ret = sdw_cdns_clock_restart(cdns, !clock_stop0);
		if (ret < 0) {
		if (ret < 0) {
			dev_err(dev, "unable to restart clock during resume\n");
			dev_err(dev, "unable to restart clock during resume\n");
			return ret;
			return ret;
		}
		}

		if (!clock_stop0) {
			ret = sdw_cdns_exit_reset(cdns);
			if (ret < 0) {
				dev_err(dev, "unable to exit bus reset sequence during resume\n");
				return ret;
			}

			if (multi_link) {
				ret = intel_shim_sync_go(sdw);
				if (ret < 0) {
					dev_err(sdw->cdns.dev, "sync go failed during resume\n");
					return ret;
				}
			}
		}
	} else if (!clock_stop_quirks) {
	} else if (!clock_stop_quirks) {
		ret = intel_init(sdw);
		ret = intel_init(sdw);
		if (ret) {
		if (ret) {