Commit d83a348b authored Aug 02, 2022 by Daniel Miess Committed by Alex Deucher Aug 16, 2022

drm/amd/display: Add debug parameter to retain default clock table



[Why]
Need a way to retain default clock table to aid
the investigation into why 8k@30 display not
lighting up on dcn314

[How]
Use flag to prevent execution of bw_params helper
function and function for updating bw_bounding_box

Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Brian Chang <Brian.Chang@amd.com>
Signed-off-by: Daniel Miess <Daniel.Miess@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

parent 373008bf

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -719,7 +719,7 @@ void dcn314_clk_mgr_construct(
		if (clk_mgr->base.base.ctx->dc->debug.pstate_enabled) {
		dcn314_get_dpm_table_from_smu(&clk_mgr->base, &smu_dpm_clks);

		if (ctx->dc_bios && ctx->dc_bios->integrated_info) {
		if (ctx->dc_bios && ctx->dc_bios->integrated_info && ctx->dc->config.use_default_clock_table == false) {
		dcn314_clk_mgr_helper_populate_bw_params(
		&clk_mgr->base,
		ctx->dc_bios->integrated_info,

drivers/gpu/drm/amd/display/dc/dc.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -353,6 +353,7 @@ struct dc_config {
		bool use_pipe_ctx_sync_logic;
		bool ignore_dpref_ss;
		bool enable_mipi_converter_optimization;
		bool use_default_clock_table;
		};

		enum visual_confirm {

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -189,7 +189,7 @@ void dcn314_update_bw_bounding_box_fpu(struct dc dc, struct clk_bw_params bw_p
		dc_assert_fp_enabled();

		// Default clock levels are used for diags, which may lead to overclocking.
		if (!IS_DIAG_DC(dc->ctx->dce_environment)) {
		if (!IS_DIAG_DC(dc->ctx->dce_environment) && dc->config.use_default_clock_table == false) {

		dcn3_14_ip.max_num_otg = dc->res_pool->res_cap->num_timing_generator;
		dcn3_14_ip.max_num_dpp = dc->res_pool->pipe_count;