Commit dd67ec81 authored by Wayne Porter's avatar Wayne Porter Committed by Greg Kroah-Hartman
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staging: rts5208: Alignment fix 



Coding style checks found by checkpatch

Signed-off-by: default avatarWayne Porter <wporter82@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent b32e807d

drivers/staging/rts5208/xd.c

+179 −153
Original line number Diff line number Diff line
@@ -133,7 +133,9 @@ static void xd_assign_phy_addr(struct rtsx_chip *chip, u32 addr, u8 mode) 
		rtsx_add_cmd(chip, WRITE_REG_CMD, XD_ADDRESS3,

			     0xFF, (u8)(addr >> 16));

		rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CFG, 0xFF,

			xd_card->addr_cycle | XD_CALC_ECC | XD_BA_NO_TRANSFORM);

			     xd_card->addr_cycle |

			     XD_CALC_ECC |

			     XD_BA_NO_TRANSFORM);

		break;



	case XD_ERASE_ADDR:
@@ -417,31 +419,46 @@ static int xd_pull_ctl_disable(struct rtsx_chip *chip) 


	if (CHECK_PID(chip, 0x5208)) {

		retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF,

					     XD_D3_PD | XD_D2_PD | XD_D1_PD | XD_D0_PD);

					     XD_D3_PD |

					     XD_D2_PD |

					     XD_D1_PD |

					     XD_D0_PD);

		if (retval) {

			rtsx_trace(chip);

			return retval;

		}

		retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF,

					     XD_D7_PD | XD_D6_PD | XD_D5_PD | XD_D4_PD);

					     XD_D7_PD |

					     XD_D6_PD |

					     XD_D5_PD |

					     XD_D4_PD);

		if (retval) {

			rtsx_trace(chip);

			return retval;

		}

		retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF,

					     XD_WP_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);

					     XD_WP_PD |

					     XD_CE_PD |

					     XD_CLE_PD |

					     XD_CD_PU);

		if (retval) {

			rtsx_trace(chip);

			return retval;

		}

		retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF,

					     XD_RDY_PD | XD_WE_PD | XD_RE_PD | XD_ALE_PD);

					     XD_RDY_PD |

					     XD_WE_PD |

					     XD_RE_PD |

					     XD_ALE_PD);

		if (retval) {

			rtsx_trace(chip);

			return retval;

		}

		retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF,

					     MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);

					     MS_INS_PU |

					     SD_WP_PD |

					     SD_CD_PU |

					     SD_CMD_PD);

		if (retval) {

			rtsx_trace(chip);

			return retval;
@@ -507,7 +524,8 @@ static int reset_xd(struct rtsx_chip *chip) 
			xd_fill_pull_ctl_stage1_barossa(chip);

	} else {

		rtsx_add_cmd(chip, WRITE_REG_CMD, FPGA_PULL_CTL, 0xFF,

			(FPGA_XD_PULL_CTL_EN1 & FPGA_XD_PULL_CTL_EN3) | 0x20);

			     (FPGA_XD_PULL_CTL_EN1 & FPGA_XD_PULL_CTL_EN3) |

			     0x20);

	}



	if (!chip->ft2_fast_mode)
@@ -537,7 +555,8 @@ static int reset_xd(struct rtsx_chip *chip) 
			xd_fill_pull_ctl_enable(chip);

		} else {

			rtsx_add_cmd(chip, WRITE_REG_CMD, FPGA_PULL_CTL, 0xFF,

				(FPGA_XD_PULL_CTL_EN1 & FPGA_XD_PULL_CTL_EN2) |

				     (FPGA_XD_PULL_CTL_EN1 &

				      FPGA_XD_PULL_CTL_EN2) |

				     0x20);

		}
@@ -571,7 +590,8 @@ static int reset_xd(struct rtsx_chip *chip) 
			xd_fill_pull_ctl_enable(chip);

		} else {

			rtsx_add_cmd(chip, WRITE_REG_CMD, FPGA_PULL_CTL, 0xFF,

				(FPGA_XD_PULL_CTL_EN1 & FPGA_XD_PULL_CTL_EN2) |

				     (FPGA_XD_PULL_CTL_EN1 &

				      FPGA_XD_PULL_CTL_EN2) |

				     0x20);

		}

	}
@@ -602,7 +622,8 @@ static int reset_xd(struct rtsx_chip *chip) 
			     XD_TIME_SETUP_STEP * 3 +

			     XD_TIME_RW_STEP * (2 + i) + XD_TIME_RWN_STEP * i);

		rtsx_add_cmd(chip, WRITE_REG_CMD, XD_CATCTL, 0xFF,

			XD_TIME_SETUP_STEP * 3 + XD_TIME_RW_STEP * (4 + i) +

			     XD_TIME_SETUP_STEP * 3 +

			     XD_TIME_RW_STEP * (4 + i) +

			     XD_TIME_RWN_STEP * (3 + i));



		rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF,
@@ -1261,10 +1282,12 @@ static int xd_copy_page(struct rtsx_chip *chip, u32 old_blk, u32 new_blk, 
					|| ((reg & (XD_ECC2_ERROR | XD_ECC2_UNCORRECTABLE)) ==

						(XD_ECC2_ERROR | XD_ECC2_UNCORRECTABLE))) {

					rtsx_write_register(chip,

							XD_PAGE_STATUS, 0xFF,

							    XD_PAGE_STATUS,

							    0xFF,

							    XD_BPG);

					rtsx_write_register(chip,

							XD_BLOCK_STATUS, 0xFF,

							    XD_BLOCK_STATUS,

							    0xFF,

							    XD_GBLK);

					XD_SET_BAD_OLDBLK(xd_card);

					dev_dbg(rtsx_dev(chip), "old block 0x%x ecc error\n",
@@ -1661,7 +1684,8 @@ static int xd_read_multiple_pages(struct rtsx_chip *chip, u32 phy_blk, 
	rtsx_add_cmd(chip, WRITE_REG_CMD, XD_TRANSFER, 0xFF,

		     XD_TRANSFER_START | XD_READ_PAGES);

	rtsx_add_cmd(chip, CHECK_REG_CMD, XD_TRANSFER,

		XD_TRANSFER_END | XD_PPB_EMPTY, XD_TRANSFER_END | XD_PPB_EMPTY);

		     XD_TRANSFER_END | XD_PPB_EMPTY,

		     XD_TRANSFER_END | XD_PPB_EMPTY);



	rtsx_send_cmd_no_wait(chip);
@@ -1946,7 +1970,8 @@ int xd_delay_write(struct rtsx_chip *chip) 
		retval = xd_finish_write(chip,

					 delay_write->old_phyblock,

					 delay_write->new_phyblock,

				delay_write->logblock, delay_write->pageoff);

					 delay_write->logblock,

					 delay_write->pageoff);

		if (retval != STATUS_SUCCESS) {

			rtsx_trace(chip);

			return STATUS_FAIL;
@@ -2019,7 +2044,8 @@ int xd_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, 
				retval = xd_copy_page(chip,

						      delay_write->old_phyblock,

						      delay_write->new_phyblock,

					delay_write->pageoff, start_page);

						      delay_write->pageoff,

						      start_page);

				if (retval != STATUS_SUCCESS) {

					set_sense_type(chip, lun,

						       SENSE_TYPE_MEDIA_WRITE_ERR);
@@ -2116,8 +2142,8 @@ int xd_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, 
		page_cnt = end_page - start_page;

		if (srb->sc_data_direction == DMA_FROM_DEVICE) {

			retval = xd_read_multiple_pages(chip, old_blk, log_blk,

					start_page, end_page, ptr,

							&index, &offset);

							start_page, end_page,

							ptr, &index, &offset);

			if (retval != STATUS_SUCCESS) {

				set_sense_type(chip, lun,

					       SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
@@ -2127,8 +2153,8 @@ int xd_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip, 
		} else {

			retval = xd_write_multiple_pages(chip, old_blk,

							 new_blk, log_blk,

					start_page, end_page, ptr,

							&index, &offset);

							 start_page, end_page,

							 ptr, &index, &offset);

			if (retval != STATUS_SUCCESS) {

				set_sense_type(chip, lun,

					       SENSE_TYPE_MEDIA_WRITE_ERR);