From dde5bff5415953f9cc7413f1b1ceebcdfd583c07 Mon Sep 17 00:00:00 2001
From: Libin Yang <libin.yang@intel.com>
Date: Thu, 6 Apr 2017 19:18:20 +0800
Subject: [PATCH] ALSA: hda - add more ML register definitions
This patch refines the definition of AZX_MLCTL_SPA and AZX_MLCTL_CPA
and add more definitions of ML registers
Signed-off-by: Libin Yang <libin.yang@intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
---
include/sound/hda_register.h | 8 +++++---
sound/hda/ext/hdac_ext_controller.c | 6 +++---
2 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/include/sound/hda_register.h b/include/sound/hda_register.h
index 1251ff41c9d3e..15fc6daf90965 100644
--- a/include/sound/hda_register.h
+++ b/include/sound/hda_register.h
@@ -261,9 +261,11 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
#define AZX_REG_ML_LOUTPAY 0x20
#define AZX_REG_ML_LINPAY 0x30
-#define AZX_MLCTL_SPA (1<<16)
-#define AZX_MLCTL_CPA 23
-
+#define ML_LCTL_SCF_MASK 0xF
+#define AZX_MLCTL_SPA (0x1 << 16)
+#define AZX_MLCTL_CPA (0x1 << 23)
+#define AZX_MLCTL_SPA_SHIFT 16
+#define AZX_MLCTL_CPA_SHIFT 23
/* registers for DMA Resume Capability Structure */
#define AZX_DRSM_CAP_ID 0x5
diff --git a/sound/hda/ext/hdac_ext_controller.c b/sound/hda/ext/hdac_ext_controller.c
index 261469188566c..84f3b81687164 100644
--- a/sound/hda/ext/hdac_ext_controller.c
+++ b/sound/hda/ext/hdac_ext_controller.c
@@ -171,7 +171,7 @@ static int check_hdac_link_power_active(struct hdac_ext_link *link, bool enable)
{
int timeout;
u32 val;
- int mask = (1 << AZX_MLCTL_CPA);
+ int mask = (1 << AZX_MLCTL_CPA_SHIFT);
udelay(3);
timeout = 150;
@@ -179,10 +179,10 @@ static int check_hdac_link_power_active(struct hdac_ext_link *link, bool enable)
do {
val = readl(link->ml_addr + AZX_REG_ML_LCTL);
if (enable) {
- if (((val & mask) >> AZX_MLCTL_CPA))
+ if (((val & mask) >> AZX_MLCTL_CPA_SHIFT))
return 0;
} else {
- if (!((val & mask) >> AZX_MLCTL_CPA))
+ if (!((val & mask) >> AZX_MLCTL_CPA_SHIFT))
return 0;
}
udelay(3);
--
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