Commit df7d6aec authored by David S. Miller's avatar David S. Miller
Browse files

[SPARC64]: Rename gl_{1,2}insn_patch --> sun4v_{1,2}insn_patch 



Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent d257d5da

arch/sparc64/kernel/etrap.S

+2 −2
Original line number Diff line number Diff line
@@ -105,7 +105,7 @@ etrap_save: save %g2, -STACK_BIAS, %sp 


		/* Go to trap time globals so we can save them.  */

661:		wrpr	%g0, ETRAP_PSTATE1, %pstate

		.section .gl_1insn_patch, "ax"

		.section .sun4v_1insn_patch, "ax"

		.word	661b

		SET_GL(0)

		.previous
@@ -206,7 +206,7 @@ etraptl1: /* Save tstate/tpc/tnpc of TL 1-->4 and the tl register itself. 


		wrpr	%g0, 1, %tl

661:		nop

		.section .gl_1insn_patch, "ax"

		.section .sun4v_1insn_patch, "ax"

		.word	661b

		SET_GL(1)

		.previous

arch/sparc64/kernel/ktlb.S

+2 −2
Original line number Diff line number Diff line
@@ -67,7 +67,7 @@ kvmap_itlb_longpath: 


661:	rdpr	%pstate, %g5

	wrpr	%g5, PSTATE_AG | PSTATE_MG, %pstate

	.section .gl_2insn_patch, "ax"

	.section .sun4v_2insn_patch, "ax"

	.word	661b

	nop

	nop
@@ -179,7 +179,7 @@ kvmap_dtlb_longpath: 


661:	rdpr	%pstate, %g5

	wrpr	%g5, PSTATE_AG | PSTATE_MG, %pstate

	.section .gl_2insn_patch, "ax"

	.section .sun4v_2insn_patch, "ax"

	.word	661b

	nop

	nop

arch/sparc64/kernel/rtrap.S

+2 −2
Original line number Diff line number Diff line
@@ -234,7 +234,7 @@ rt_continue: ldx [%sp + PTREGS_OFF + PT_V9_G1], %g1 


		/* Normal globals are restored, go to trap globals.  */

661:		wrpr			%g0, RTRAP_PSTATE_AG_IRQOFF, %pstate

		.section		.gl_1insn_patch, "ax"

		.section		.sun4v_1insn_patch, "ax"

		.word			661b

		SET_GL(1)

		.previous
@@ -316,7 +316,7 @@ user_rtt_fill_fixup: 
		wrpr	%g0, RTRAP_PSTATE, %pstate



661:		nop

		.section		.gl_1insn_patch, "ax"

		.section		.sun4v_1insn_patch, "ax"

		.word			661b

		SET_GL(0)

		.previous

arch/sparc64/kernel/setup.c

+8 −8
Original line number Diff line number Diff line
@@ -549,16 +549,16 @@ static void __init per_cpu_patch(void) 
#endif

}



static void __init gl_patch(void)

static void __init sun4v_patch(void)

{

	struct gl_1insn_patch_entry *p1;

	struct gl_2insn_patch_entry *p2;

	struct sun4v_1insn_patch_entry *p1;

	struct sun4v_2insn_patch_entry *p2;



	if (tlb_type != hypervisor)

		return;



	p1 = &__gl_1insn_patch;

	while (p1 < &__gl_1insn_patch_end) {

	p1 = &__sun4v_1insn_patch;

	while (p1 < &__sun4v_1insn_patch_end) {

		unsigned long addr = p1->addr;



		*(unsigned int *) (addr +  0) = p1->insn;
@@ -568,8 +568,8 @@ static void __init gl_patch(void) 
		p1++;

	}



	p2 = &__gl_2insn_patch;

	while (p2 < &__gl_2insn_patch_end) {

	p2 = &__sun4v_2insn_patch;

	while (p2 < &__sun4v_2insn_patch_end) {

		unsigned long addr = p2->addr;



		*(unsigned int *) (addr +  0) = p2->insns[0];
@@ -606,7 +606,7 @@ void __init setup_arch(char **cmdline_p) 
	 */

	per_cpu_patch();



	gl_patch();

	sun4v_patch();



	boot_flags_init(*cmdline_p);

arch/sparc64/kernel/tsb.S

+6 −6
Original line number Diff line number Diff line
@@ -74,7 +74,7 @@ tsb_dtlb_load: 


661:	stxa		%g5, [%g0] ASI_DTLB_DATA_IN

	retry

	.section	.gl_2insn_patch, "ax"

	.section	.sun4v_2insn_patch, "ax"

	.word		661b

	nop

	nop
@@ -99,7 +99,7 @@ tsb_itlb_load: 


661:	stxa		%g5, [%g0] ASI_ITLB_DATA_IN

	retry

	.section	.gl_2insn_patch, "ax"

	.section	.sun4v_2insn_patch, "ax"

	.word		661b

	nop

	nop
@@ -130,7 +130,7 @@ tsb_do_fault: 


661:	rdpr		%pstate, %g5

	wrpr		%g5, PSTATE_AG | PSTATE_MG, %pstate

	.section	.gl_2insn_patch, "ax"

	.section	.sun4v_2insn_patch, "ax"

	.word		661b

	nop

	nop
@@ -145,7 +145,7 @@ tsb_do_dtlb_fault: 


661:	mov	TLB_TAG_ACCESS, %g4

	ldxa	[%g4] ASI_DMMU, %g5

	.section .gl_2insn_patch, "ax"

	.section .sun4v_2insn_patch, "ax"

	.word	661b

	mov	%g4, %g5

	nop
@@ -250,7 +250,7 @@ __tsb_context_switch: 


661:	mov	TSB_REG, %g1

	stxa	%o1, [%g1] ASI_DMMU

	.section .gl_2insn_patch, "ax"

	.section .sun4v_2insn_patch, "ax"

	.word	661b

	mov	SCRATCHPAD_UTSBREG1, %g1

	stxa	%o1, [%g1] ASI_SCRATCHPAD
@@ -260,7 +260,7 @@ __tsb_context_switch: 


661:	stxa	%o1, [%g1] ASI_IMMU

	membar	#Sync

	.section .gl_2insn_patch, "ax"

	.section .sun4v_2insn_patch, "ax"

	.word	661b

	nop

	nop