Commit e0768073 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

arm64: dts: renesas: r8a779g0: Add MSIOF nodes 



Add device nodes for the Clock-Synchronized Serial Interfaces with FIFO
(MSIOF) on the Renesas R-Car V4H (R8A779G0) SoC, including DMA support.

Based on patches in the BSP by Thanh Quan.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/450921ef6d8c30ca2953a1665c8597f6a69d01f2.1664204771.git.geert+renesas@glider.be
parent 08f28288

arch/arm64/boot/dts/renesas/r8a779g0.dtsi

+96 −0
Original line number Diff line number Diff line
@@ -496,6 +496,102 @@ avb2: ethernet@e6820000 { 
			status = "disabled";

		};



		msiof0: spi@e6e90000 {

			compatible = "renesas,msiof-r8a779g0",

				     "renesas,rcar-gen4-msiof";

			reg = <0 0xe6e90000 0 0x0064>;

			interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 618>;

			dmas = <&dmac0 0x41>, <&dmac0 0x40>,

			       <&dmac1 0x41>, <&dmac1 0x40>;

			dma-names = "tx", "rx", "tx", "rx";

			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;

			resets = <&cpg 618>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		msiof1: spi@e6ea0000 {

			compatible = "renesas,msiof-r8a779g0",

				     "renesas,rcar-gen4-msiof";

			reg = <0 0xe6ea0000 0 0x0064>;

			interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 619>;

			dmas = <&dmac0 0x43>, <&dmac0 0x42>,

			       <&dmac1 0x43>, <&dmac1 0x42>;

			dma-names = "tx", "rx", "tx", "rx";

			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;

			resets = <&cpg 619>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		msiof2: spi@e6c00000 {

			compatible = "renesas,msiof-r8a779g0",

				     "renesas,rcar-gen4-msiof";

			reg = <0 0xe6c00000 0 0x0064>;

			interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 620>;

			dmas = <&dmac0 0x45>, <&dmac0 0x44>,

			       <&dmac1 0x45>, <&dmac1 0x44>;

			dma-names = "tx", "rx", "tx", "rx";

			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;

			resets = <&cpg 620>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		msiof3: spi@e6c10000 {

			compatible = "renesas,msiof-r8a779g0",

				     "renesas,rcar-gen4-msiof";

			reg = <0 0xe6c10000 0 0x0064>;

			interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 621>;

			dmas = <&dmac0 0x47>, <&dmac0 0x46>,

			       <&dmac1 0x47>, <&dmac1 0x46>;

			dma-names = "tx", "rx", "tx", "rx";

			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;

			resets = <&cpg 621>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		msiof4: spi@e6c20000 {

			compatible = "renesas,msiof-r8a779g0",

				     "renesas,rcar-gen4-msiof";

			reg = <0 0xe6c20000 0 0x0064>;

			interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 622>;

			dmas = <&dmac0 0x49>, <&dmac0 0x48>,

			       <&dmac1 0x49>, <&dmac1 0x48>;

			dma-names = "tx", "rx", "tx", "rx";

			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;

			resets = <&cpg 622>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		msiof5: spi@e6c28000 {

			compatible = "renesas,msiof-r8a779g0",

				     "renesas,rcar-gen4-msiof";

			reg = <0 0xe6c28000 0 0x0064>;

			interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 623>;

			dmas = <&dmac0 0x4b>, <&dmac0 0x4a>,

			       <&dmac1 0x4b>, <&dmac1 0x4a>;

			dma-names = "tx", "rx", "tx", "rx";

			power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;

			resets = <&cpg 623>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		dmac0: dma-controller@e7350000 {

			compatible = "renesas,dmac-r8a779g0",

				     "renesas,rcar-gen4-dmac";