Commit e15197bd authored by Jacopo Mondi's avatar Jacopo Mondi Committed by Mauro Carvalho Chehab
Browse files

media: ov5640: Re-sort per-mode register tables 



The per-mode register tables are not sorted by size. Fix it.

Cosmetic change only.

Signed-off-by: default avatarJacopo Mondi <jacopo@jmondi.org>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarSakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@kernel.org>
parent 2de6bb97

drivers/media/i2c/ov5640.c

+9 −9
Original line number Diff line number Diff line
@@ -484,7 +484,7 @@ static const struct reg_value ov5640_init_setting_30fps_VGA[] = { 
	{0x3a1f, 0x14, 0, 0}, {0x3008, 0x02, 0, 0}, {0x3c00, 0x04, 0, 300},

};



static const struct reg_value ov5640_setting_VGA_640_480[] = {

static const struct reg_value ov5640_setting_QQVGA_160_120[] = {

	{0x3c07, 0x08, 0, 0},

	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},

	{0x3814, 0x31, 0, 0},
@@ -495,11 +495,10 @@ static const struct reg_value ov5640_setting_VGA_640_480[] = { 
	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},

	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},

	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},

	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},

	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},

	{0x4407, 0x04, 0, 0}, {0x5001, 0xa3, 0, 0},

};



static const struct reg_value ov5640_setting_XGA_1024_768[] = {

static const struct reg_value ov5640_setting_QCIF_176_144[] = {

	{0x3c07, 0x08, 0, 0},

	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},

	{0x3814, 0x31, 0, 0},
@@ -529,7 +528,7 @@ static const struct reg_value ov5640_setting_QVGA_320_240[] = { 
	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},

};



static const struct reg_value ov5640_setting_QQVGA_160_120[] = {

static const struct reg_value ov5640_setting_VGA_640_480[] = {

	{0x3c07, 0x08, 0, 0},

	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},

	{0x3814, 0x31, 0, 0},
@@ -540,10 +539,11 @@ static const struct reg_value ov5640_setting_QQVGA_160_120[] = { 
	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},

	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},

	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},

	{0x4407, 0x04, 0, 0}, {0x5001, 0xa3, 0, 0},

	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},

	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},

};



static const struct reg_value ov5640_setting_QCIF_176_144[] = {

static const struct reg_value ov5640_setting_NTSC_720_480[] = {

	{0x3c07, 0x08, 0, 0},

	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},

	{0x3814, 0x31, 0, 0},
@@ -558,7 +558,7 @@ static const struct reg_value ov5640_setting_QCIF_176_144[] = { 
	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},

};



static const struct reg_value ov5640_setting_NTSC_720_480[] = {

static const struct reg_value ov5640_setting_PAL_720_576[] = {

	{0x3c07, 0x08, 0, 0},

	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},

	{0x3814, 0x31, 0, 0},
@@ -573,7 +573,7 @@ static const struct reg_value ov5640_setting_NTSC_720_480[] = { 
	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},

};



static const struct reg_value ov5640_setting_PAL_720_576[] = {

static const struct reg_value ov5640_setting_XGA_1024_768[] = {

	{0x3c07, 0x08, 0, 0},

	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},

	{0x3814, 0x31, 0, 0},