Commit e1b89b1c authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nvc0/gr: some initial state modifications 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 6f376460

drivers/gpu/drm/nouveau/nvc0_graph.c

+1 −1
Original line number Diff line number Diff line
@@ -159,7 +159,7 @@ nvc0_graph_create_context_mmio_list(struct nouveau_channel *chan) 
	nv_wo32(grch->mmio, i++ * 4, 0x00405830);

	nv_wo32(grch->mmio, i++ * 4, magic);

	for (gpc = 0; gpc < priv->gpc_nr; gpc++) {

		for (tp = 0; tp < priv->tp_nr[gpc]; tp++, magic += 0x02fc) {

		for (tp = 0; tp < priv->tp_nr[gpc]; tp++, magic += 0x0324) {

			u32 reg = 0x504520 + (gpc * 0x8000) + (tp * 0x0800);

			nv_wo32(grch->mmio, i++ * 4, reg);

			nv_wo32(grch->mmio, i++ * 4, magic);

drivers/gpu/drm/nouveau/nvc0_grctx.c

+4 −12
Original line number Diff line number Diff line
@@ -1531,21 +1531,11 @@ nvc0_grctx_generate_ccache(struct drm_device *dev) 
static void

nvc0_grctx_generate_rop(struct drm_device *dev)

{

	struct drm_nouveau_private *dev_priv = dev->dev_private;



	/* ROPC_BROADCAST */

	nv_wr32(dev, 0x408800, 0x02802a3c);

	nv_wr32(dev, 0x408804, 0x00000040);

	nv_wr32(dev, 0x408808, 0x0003e00d);

	switch (dev_priv->chipset) {

	case 0xc0:

		nv_wr32(dev, 0x408900, 0x0080b801);

		break;

	case 0xc3:

	case 0xc4:

	nv_wr32(dev, 0x408900, 0x3080b801);

		break;

	}

	nv_wr32(dev, 0x408904, 0x02000001);

	nv_wr32(dev, 0x408908, 0x00c80929);

	nv_wr32(dev, 0x40890c, 0x00000000);
@@ -1639,6 +1629,8 @@ nvc0_grctx_generate_tp(struct drm_device *dev) 
	struct drm_nouveau_private *dev_priv = dev->dev_private;



	/* GPC_BROADCAST.TP_BROADCAST */

	nv_wr32(dev, 0x419818, 0x00000000);

	nv_wr32(dev, 0x41983c, 0x00038bc7);

	nv_wr32(dev, 0x419848, 0x00000000);

	nv_wr32(dev, 0x419864, 0x0000012a);

	nv_wr32(dev, 0x419888, 0x00000000);
@@ -1665,7 +1657,7 @@ nvc0_grctx_generate_tp(struct drm_device *dev) 
	nv_wr32(dev, 0x419c04, 0x00000006);

	nv_wr32(dev, 0x419c08, 0x00000002);

	nv_wr32(dev, 0x419c20, 0x00000000);

	nv_wr32(dev, 0x419cbc, 0x28137606);

	nv_wr32(dev, 0x419cb0, 0x00060048);

	nv_wr32(dev, 0x419ce8, 0x00000000);

	nv_wr32(dev, 0x419cf4, 0x00000183);

	nv_wr32(dev, 0x419d20, 0x02180000);