Unverified Commit e2b96ceb authored Apr 22, 2023 by Krzysztof Kozlowski Committed by Chester Lin May 13, 2023

arm64: dts: s32: add missing cache properties



As all level 2 and level 3 caches are unified, add required
cache-unified properties to fix warnings like:

  s32g274a-evb.dtb: l2-cache1: 'cache-unified' is a required property

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Chester Lin <clin@suse.com>
Link: https://lore.kernel.org/r/20230421223202.115472-1-krzysztof.kozlowski@linaro.org

parent ac9a7868

arch/arm64/boot/dts/freescale/s32g2.dtsi

+2 −0

Original line number	Diff line number	Diff line
		@@ -53,11 +53,13 @@ cpu3: cpu@101 {
		cluster0_l2: l2-cache0 {
		compatible = "cache";
		cache-level = <2>;
		cache-unified;
		};

		cluster1_l2: l2-cache1 {
		compatible = "cache";
		cache-level = <2>;
		cache-unified;
		};
		};

arch/arm64/boot/dts/freescale/s32v234.dtsi

+2 −0

Original line number	Diff line number	Diff line
		@@ -62,11 +62,13 @@ cpu3: cpu@101 {
		cluster0_l2_cache: l2-cache0 {
		compatible = "cache";
		cache-level = <2>;
		cache-unified;
		};

		cluster1_l2_cache: l2-cache1 {
		compatible = "cache";
		cache-level = <2>;
		cache-unified;
		};
		};