Commit e2eeec75 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/gr/gp100-: fix number of zcull tile regs 



Match RM.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
parent 0c520ad4

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf117.c

+3 −1
Original line number Diff line number Diff line
@@ -125,7 +125,9 @@ gf117_gr_init_zcull(struct gf100_gr *gr) 
{

	struct nvkm_device *device = gr->base.engine.subdev.device;

	const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);

	const u8 tile_nr = ALIGN(gr->tpc_total, 32);

	/*TODO: fill in litter vals for gf117-gm2xx */

	const u8 tile_nr = !gr->func->gpc_nr ? ALIGN(gr->tpc_total, 32) :

			   (gr->func->gpc_nr * gr->func->tpc_nr);

	u8 bank[GPC_MAX] = {}, gpc, i, j;

	u32 data;

drivers/gpu/drm/nouveau/nvkm/engine/gr/tu102.c

+2 −2
Original line number Diff line number Diff line
@@ -53,7 +53,7 @@ tu102_gr_init_zcull(struct gf100_gr *gr) 
{

	struct nvkm_device *device = gr->base.engine.subdev.device;

	const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);

	const u8 tile_nr = ALIGN(gr->tpc_total, 64);

	const u8 tile_nr = gr->func->gpc_nr * gr->func->tpc_nr;

	u8 bank[GPC_MAX] = {}, gpc, i, j;

	u32 data;
@@ -115,7 +115,7 @@ tu102_gr = { 
	.fecs.reset = gf100_gr_fecs_reset,

	.rops = gm200_gr_rops,

	.gpc_nr = 6,

	.tpc_nr = 5,

	.tpc_nr = 6,

	.ppc_nr = 3,

	.grctx = &tu102_grctx,

	.zbc = &gp102_gr_zbc,