Commit e3eca2e4 authored by Joerg Roedel's avatar Joerg Roedel
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Merge branches 'arm/allwinner', 'arm/exynos', 'arm/mediatek', 'arm/rockchip',...

Merge branches 'arm/allwinner', 'arm/exynos', 'arm/mediatek', 'arm/rockchip', 'arm/smmu', 'ppc/pamu', 's390', 'x86/vt-d', 'x86/amd' and 'core' into next
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+22 −5
Original line number Original line Diff line number Diff line
@@ -2300,7 +2300,13 @@
			Provide an override to the IOAPIC-ID<->DEVICE-ID
			Provide an override to the IOAPIC-ID<->DEVICE-ID
			mapping provided in the IVRS ACPI table.
			mapping provided in the IVRS ACPI table.
			By default, PCI segment is 0, and can be omitted.
			By default, PCI segment is 0, and can be omitted.
			For example:

			For example, to map IOAPIC-ID decimal 10 to
			PCI segment 0x1 and PCI device 00:14.0,
			write the parameter as:
				ivrs_ioapic=10@0001:00:14.0

			Deprecated formats:
			* To map IOAPIC-ID decimal 10 to PCI device 00:14.0
			* To map IOAPIC-ID decimal 10 to PCI device 00:14.0
			  write the parameter as:
			  write the parameter as:
				ivrs_ioapic[10]=00:14.0
				ivrs_ioapic[10]=00:14.0
@@ -2312,7 +2318,13 @@
			Provide an override to the HPET-ID<->DEVICE-ID
			Provide an override to the HPET-ID<->DEVICE-ID
			mapping provided in the IVRS ACPI table.
			mapping provided in the IVRS ACPI table.
			By default, PCI segment is 0, and can be omitted.
			By default, PCI segment is 0, and can be omitted.
			For example:

			For example, to map HPET-ID decimal 10 to
			PCI segment 0x1 and PCI device 00:14.0,
			write the parameter as:
				ivrs_hpet=10@0001:00:14.0

			Deprecated formats:
			* To map HPET-ID decimal 0 to PCI device 00:14.0
			* To map HPET-ID decimal 0 to PCI device 00:14.0
			  write the parameter as:
			  write the parameter as:
				ivrs_hpet[0]=00:14.0
				ivrs_hpet[0]=00:14.0
@@ -2323,15 +2335,20 @@
	ivrs_acpihid	[HW,X86-64]
	ivrs_acpihid	[HW,X86-64]
			Provide an override to the ACPI-HID:UID<->DEVICE-ID
			Provide an override to the ACPI-HID:UID<->DEVICE-ID
			mapping provided in the IVRS ACPI table.
			mapping provided in the IVRS ACPI table.
			By default, PCI segment is 0, and can be omitted.


			For example, to map UART-HID:UID AMD0020:0 to
			For example, to map UART-HID:UID AMD0020:0 to
			PCI segment 0x1 and PCI device ID 00:14.5,
			PCI segment 0x1 and PCI device ID 00:14.5,
			write the parameter as:
			write the parameter as:
				ivrs_acpihid[0001:00:14.5]=AMD0020:0
				ivrs_acpihid=AMD0020:0@0001:00:14.5


			By default, PCI segment is 0, and can be omitted.
			Deprecated formats:
			For example, PCI device 00:14.5 write the parameter as:
			* To map UART-HID:UID AMD0020:0 to PCI segment is 0,
			  PCI device ID 00:14.5, write the parameter as:
				ivrs_acpihid[00:14.5]=AMD0020:0
				ivrs_acpihid[00:14.5]=AMD0020:0
			* To map UART-HID:UID AMD0020:0 to PCI segment 0x1 and
			  PCI device ID 00:14.5, write the parameter as:
				ivrs_acpihid[0001:00:14.5]=AMD0020:0


	js=		[HW,JOY] Analog joystick
	js=		[HW,JOY] Analog joystick
			See Documentation/input/joydev/joystick.rst.
			See Documentation/input/joydev/joystick.rst.
+169 −9
Original line number Original line Diff line number Diff line
@@ -28,19 +28,50 @@ properties:
          - enum:
          - enum:
              - qcom,msm8996-smmu-v2
              - qcom,msm8996-smmu-v2
              - qcom,msm8998-smmu-v2
              - qcom,msm8998-smmu-v2
              - qcom,sdm630-smmu-v2
          - const: qcom,smmu-v2
          - const: qcom,smmu-v2


      - description: Qcom SoCs implementing "arm,mmu-500"
      - description: Qcom SoCs implementing "qcom,smmu-500" and "arm,mmu-500"
        items:
        items:
          - enum:
          - enum:
              - qcom,qcm2290-smmu-500
              - qcom,qcm2290-smmu-500
              - qcom,qdu1000-smmu-500
              - qcom,sc7180-smmu-500
              - qcom,sc7180-smmu-500
              - qcom,sc7280-smmu-500
              - qcom,sc7280-smmu-500
              - qcom,sc8180x-smmu-500
              - qcom,sc8180x-smmu-500
              - qcom,sc8280xp-smmu-500
              - qcom,sc8280xp-smmu-500
              - qcom,sdm670-smmu-500
              - qcom,sdm845-smmu-500
              - qcom,sdm845-smmu-500
              - qcom,sm6115-smmu-500
              - qcom,sm6350-smmu-500
              - qcom,sm6375-smmu-500
              - qcom,sm8150-smmu-500
              - qcom,sm8250-smmu-500
              - qcom,sm8350-smmu-500
              - qcom,sm8450-smmu-500
          - const: qcom,smmu-500
          - const: arm,mmu-500

      - description: Qcom SoCs implementing "arm,mmu-500" (non-qcom implementation)
        deprecated: true
        items:
          - enum:
              - qcom,sdx55-smmu-500
              - qcom,sdx55-smmu-500
              - qcom,sdx65-smmu-500
              - qcom,sdx65-smmu-500
          - const: arm,mmu-500

      - description: Qcom SoCs implementing "arm,mmu-500" (legacy binding)
        deprecated: true
        items:
          # Do not add additional SoC to this list. Instead use two previous lists.
          - enum:
              - qcom,qcm2290-smmu-500
              - qcom,sc7180-smmu-500
              - qcom,sc7280-smmu-500
              - qcom,sc8180x-smmu-500
              - qcom,sc8280xp-smmu-500
              - qcom,sdm845-smmu-500
              - qcom,sm6115-smmu-500
              - qcom,sm6350-smmu-500
              - qcom,sm6350-smmu-500
              - qcom,sm6375-smmu-500
              - qcom,sm6375-smmu-500
              - qcom,sm8150-smmu-500
              - qcom,sm8150-smmu-500
@@ -48,13 +79,28 @@ properties:
              - qcom,sm8350-smmu-500
              - qcom,sm8350-smmu-500
              - qcom,sm8450-smmu-500
              - qcom,sm8450-smmu-500
          - const: arm,mmu-500
          - const: arm,mmu-500

      - description: Qcom Adreno GPUs implementing "arm,smmu-500"
        items:
          - enum:
              - qcom,sc7280-smmu-500
              - qcom,sm8250-smmu-500
          - const: qcom,adreno-smmu
          - const: arm,mmu-500
      - description: Qcom Adreno GPUs implementing "arm,smmu-v2"
      - description: Qcom Adreno GPUs implementing "arm,smmu-v2"
        items:
        items:
          - enum:
          - enum:
              - qcom,msm8996-smmu-v2
              - qcom,sc7180-smmu-v2
              - qcom,sc7180-smmu-v2
              - qcom,sdm630-smmu-v2
              - qcom,sdm845-smmu-v2
              - qcom,sdm845-smmu-v2
              - qcom,sm6350-smmu-v2
          - const: qcom,adreno-smmu
          - const: qcom,adreno-smmu
          - const: qcom,smmu-v2
          - const: qcom,smmu-v2
      - description: Qcom Adreno GPUs on Google Cheza platform
        items:
          - const: qcom,sdm845-smmu-v2
          - const: qcom,smmu-v2
      - description: Marvell SoCs implementing "arm,mmu-500"
      - description: Marvell SoCs implementing "arm,mmu-500"
        items:
        items:
          - const: marvell,ap806-smmu-500
          - const: marvell,ap806-smmu-500
@@ -147,16 +193,12 @@ properties:
      present in such cases.
      present in such cases.


  clock-names:
  clock-names:
    items:
    minItems: 1
      - const: bus
    maxItems: 7
      - const: iface


  clocks:
  clocks:
    items:
    minItems: 1
      - description: bus clock required for downstream bus access and for the
    maxItems: 7
          smmu ptw
      - description: interface clock required to access smmu's registers
          through the TCU's programming interface.


  power-domains:
  power-domains:
    maxItems: 1
    maxItems: 1
@@ -206,6 +248,124 @@ allOf:
        reg:
        reg:
          maxItems: 1
          maxItems: 1


  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,msm8998-smmu-v2
              - qcom,sdm630-smmu-v2
    then:
      anyOf:
        - properties:
            clock-names:
              items:
                - const: bus
            clocks:
              items:
                - description: bus clock required for downstream bus access and for
                    the smmu ptw
        - properties:
            clock-names:
              items:
                - const: iface
                - const: mem
                - const: mem_iface
            clocks:
              items:
                - description: interface clock required to access smmu's registers
                    through the TCU's programming interface.
                - description: bus clock required for memory access
                - description: bus clock required for GPU memory access
        - properties:
            clock-names:
              items:
                - const: iface-mm
                - const: iface-smmu
                - const: bus-mm
                - const: bus-smmu
            clocks:
              items:
                - description: interface clock required to access mnoc's registers
                    through the TCU's programming interface.
                - description: interface clock required to access smmu's registers
                    through the TCU's programming interface.
                - description: bus clock required for downstream bus access
                - description: bus clock required for the smmu ptw

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,msm8996-smmu-v2
              - qcom,sc7180-smmu-v2
              - qcom,sdm845-smmu-v2
    then:
      properties:
        clock-names:
          items:
            - const: bus
            - const: iface

        clocks:
          items:
            - description: bus clock required for downstream bus access and for
                the smmu ptw
            - description: interface clock required to access smmu's registers
                through the TCU's programming interface.

  - if:
      properties:
        compatible:
          contains:
            const: qcom,sc7280-smmu-500
    then:
      properties:
        clock-names:
          items:
            - const: gcc_gpu_memnoc_gfx_clk
            - const: gcc_gpu_snoc_dvm_gfx_clk
            - const: gpu_cc_ahb_clk
            - const: gpu_cc_hlos1_vote_gpu_smmu_clk
            - const: gpu_cc_cx_gmu_clk
            - const: gpu_cc_hub_cx_int_clk
            - const: gpu_cc_hub_aon_clk

        clocks:
          items:
            - description: GPU memnoc_gfx clock
            - description: GPU snoc_dvm_gfx clock
            - description: GPU ahb clock
            - description: GPU hlos1_vote_GPU smmu clock
            - description: GPU cx_gmu clock
            - description: GPU hub_cx_int clock
            - description: GPU hub_aon clock

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,sm6350-smmu-v2
              - qcom,sm8150-smmu-500
              - qcom,sm8250-smmu-500
    then:
      properties:
        clock-names:
          items:
            - const: ahb
            - const: bus
            - const: iface

        clocks:
          items:
            - description: bus clock required for AHB bus access
            - description: bus clock required for downstream bus access and for
                the smmu ptw
            - description: interface clock required to access smmu's registers
                through the TCU's programming interface.

examples:
examples:
  - |+
  - |+
    /* SMMU with stream matching or stream indexing */
    /* SMMU with stream matching or stream indexing */
+2 −0
Original line number Original line Diff line number Diff line
@@ -82,6 +82,7 @@ properties:
          - mediatek,mt8195-iommu-vdo        # generation two
          - mediatek,mt8195-iommu-vdo        # generation two
          - mediatek,mt8195-iommu-vpp        # generation two
          - mediatek,mt8195-iommu-vpp        # generation two
          - mediatek,mt8195-iommu-infra      # generation two
          - mediatek,mt8195-iommu-infra      # generation two
          - mediatek,mt8365-m4u  # generation two


      - description: mt7623 generation one
      - description: mt7623 generation one
        items:
        items:
@@ -132,6 +133,7 @@ properties:
      dt-binding/memory/mt8186-memory-port.h for mt8186,
      dt-binding/memory/mt8186-memory-port.h for mt8186,
      dt-binding/memory/mt8192-larb-port.h for mt8192.
      dt-binding/memory/mt8192-larb-port.h for mt8192.
      dt-binding/memory/mt8195-memory-port.h for mt8195.
      dt-binding/memory/mt8195-memory-port.h for mt8195.
      dt-binding/memory/mediatek,mt8365-larb-port.h for mt8365.


  power-domains:
  power-domains:
    maxItems: 1
    maxItems: 1
+3 −2
Original line number Original line Diff line number Diff line
@@ -117,7 +117,9 @@ struct zpci_bus {
struct zpci_dev {
struct zpci_dev {
	struct zpci_bus *zbus;
	struct zpci_bus *zbus;
	struct list_head entry;		/* list of all zpci_devices, needed for hotplug, etc. */
	struct list_head entry;		/* list of all zpci_devices, needed for hotplug, etc. */
	struct list_head iommu_list;
	struct kref kref;
	struct kref kref;
	struct rcu_head rcu;
	struct hotplug_slot hotplug_slot;
	struct hotplug_slot hotplug_slot;


	enum zpci_state state;
	enum zpci_state state;
@@ -155,7 +157,6 @@ struct zpci_dev {


	/* DMA stuff */
	/* DMA stuff */
	unsigned long	*dma_table;
	unsigned long	*dma_table;
	spinlock_t	dma_table_lock;
	int		tlb_refresh;
	int		tlb_refresh;


	spinlock_t	iommu_bitmap_lock;
	spinlock_t	iommu_bitmap_lock;
@@ -220,7 +221,7 @@ void zpci_device_reserved(struct zpci_dev *zdev);
bool zpci_is_device_configured(struct zpci_dev *zdev);
bool zpci_is_device_configured(struct zpci_dev *zdev);


int zpci_hot_reset_device(struct zpci_dev *zdev);
int zpci_hot_reset_device(struct zpci_dev *zdev);
int zpci_register_ioat(struct zpci_dev *, u8, u64, u64, u64);
int zpci_register_ioat(struct zpci_dev *, u8, u64, u64, u64, u8 *);
int zpci_unregister_ioat(struct zpci_dev *, u8);
int zpci_unregister_ioat(struct zpci_dev *, u8);
void zpci_remove_reserved_devices(void);
void zpci_remove_reserved_devices(void);
void zpci_update_fh(struct zpci_dev *zdev, u32 fh);
void zpci_update_fh(struct zpci_dev *zdev, u32 fh);
+4 −2
Original line number Original line Diff line number Diff line
@@ -434,6 +434,7 @@ static void kvm_s390_pci_dev_release(struct zpci_dev *zdev)
static int kvm_s390_pci_register_kvm(void *opaque, struct kvm *kvm)
static int kvm_s390_pci_register_kvm(void *opaque, struct kvm *kvm)
{
{
	struct zpci_dev *zdev = opaque;
	struct zpci_dev *zdev = opaque;
	u8 status;
	int rc;
	int rc;


	if (!zdev)
	if (!zdev)
@@ -486,7 +487,7 @@ static int kvm_s390_pci_register_kvm(void *opaque, struct kvm *kvm)


	/* Re-register the IOMMU that was already created */
	/* Re-register the IOMMU that was already created */
	rc = zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
	rc = zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
				virt_to_phys(zdev->dma_table));
				virt_to_phys(zdev->dma_table), &status);
	if (rc)
	if (rc)
		goto clear_gisa;
		goto clear_gisa;


@@ -516,6 +517,7 @@ static void kvm_s390_pci_unregister_kvm(void *opaque)
{
{
	struct zpci_dev *zdev = opaque;
	struct zpci_dev *zdev = opaque;
	struct kvm *kvm;
	struct kvm *kvm;
	u8 status;


	if (!zdev)
	if (!zdev)
		return;
		return;
@@ -554,7 +556,7 @@ static void kvm_s390_pci_unregister_kvm(void *opaque)


	/* Re-register the IOMMU that was already created */
	/* Re-register the IOMMU that was already created */
	zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
	zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
			   virt_to_phys(zdev->dma_table));
			   virt_to_phys(zdev->dma_table), &status);


out:
out:
	spin_lock(&kvm->arch.kzdev_list_lock);
	spin_lock(&kvm->arch.kzdev_list_lock);
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