Commit e4c19deb authored by Luo Jiaxing's avatar Luo Jiaxing Committed by Martin K. Petersen
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scsi: hisi_sas: Ignore the error code between phy down to phy up



Several error codes will be generated between PHY down to up.

This issue was introduced by HW design. The designers came to the
conclusion that we should ignore these errors.

Signed-off-by: default avatarJiaxing Luo <luojiaxing@huawei.com>
Signed-off-by: default avatarJohn Garry <john.garry@huawei.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 0ab7bc82
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+15 −0
Original line number Diff line number Diff line
@@ -911,8 +911,14 @@ static void enable_phy_v3_hw(struct hisi_hba *hisi_hba, int phy_no)
static void disable_phy_v3_hw(struct hisi_hba *hisi_hba, int phy_no)
{
	u32 cfg = hisi_sas_phy_read32(hisi_hba, phy_no, PHY_CFG);
	u32 irq_msk = hisi_sas_phy_read32(hisi_hba, phy_no, CHL_INT2_MSK);
	static const u32 msk = BIT(CHL_INT2_RX_DISP_ERR_OFF) |
			       BIT(CHL_INT2_RX_CODE_ERR_OFF) |
			       BIT(CHL_INT2_RX_INVLD_DW_OFF);
	u32 state;

	hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT2_MSK, msk | irq_msk);

	cfg &= ~PHY_CFG_ENA_MSK;
	hisi_sas_phy_write32(hisi_hba, phy_no, PHY_CFG, cfg);

@@ -923,6 +929,15 @@ static void disable_phy_v3_hw(struct hisi_hba *hisi_hba, int phy_no)
		cfg |= PHY_CFG_PHY_RST_MSK;
		hisi_sas_phy_write32(hisi_hba, phy_no, PHY_CFG, cfg);
	}

	udelay(1);

	hisi_sas_phy_read32(hisi_hba, phy_no, ERR_CNT_INVLD_DW);
	hisi_sas_phy_read32(hisi_hba, phy_no, ERR_CNT_DISP_ERR);
	hisi_sas_phy_read32(hisi_hba, phy_no, ERR_CNT_CODE_ERR);

	hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT2, msk);
	hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT2_MSK, irq_msk);
}

static void start_phy_v3_hw(struct hisi_hba *hisi_hba, int phy_no)