Loading Documentation/devicetree/bindings/arm/pmu.txt +4 −0 Original line number Diff line number Diff line Loading @@ -7,8 +7,12 @@ representation in the device tree should be done as under:- Required properties: - compatible : should be one of "arm,cortex-a15-pmu" "arm,cortex-a9-pmu" "arm,cortex-a8-pmu" "arm,cortex-a7-pmu" "arm,cortex-a5-pmu" "arm,arm11mpcore-pmu" "arm,arm1176-pmu" "arm,arm1136-pmu" - interrupts : 1 combined interrupt or 1 per core. Loading MAINTAINERS +0 −1 Original line number Diff line number Diff line Loading @@ -595,7 +595,6 @@ M: Will Deacon <will.deacon@arm.com> S: Maintained F: arch/arm/kernel/perf_event* F: arch/arm/oprofile/common.c F: arch/arm/kernel/pmu.c F: arch/arm/include/asm/pmu.h F: arch/arm/kernel/hw_breakpoint.c F: arch/arm/include/asm/hw_breakpoint.h Loading arch/arm/Kconfig +1 −7 Original line number Diff line number Diff line Loading @@ -1179,12 +1179,6 @@ config XSCALE_PMU depends on CPU_XSCALE default y config CPU_HAS_PMU depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \ (!ARCH_OMAP3 || OMAP3_EMU) default y bool config MULTI_IRQ_HANDLER bool help Loading Loading @@ -1757,7 +1751,7 @@ config HIGHPTE config HW_PERF_EVENTS bool "Enable hardware performance counter support for perf events" depends on PERF_EVENTS && CPU_HAS_PMU depends on PERF_EVENTS default y help Enable hardware performance counter support for perf events. If Loading arch/arm/configs/kzm9d_defconfig +1 −0 Original line number Diff line number Diff line Loading @@ -8,6 +8,7 @@ CONFIG_LOG_BUF_SHIFT=16 CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL_SYSCALL=y CONFIG_EMBEDDED=y CONFIG_PERF_EVENTS=y CONFIG_SLAB=y # CONFIG_BLK_DEV_BSG is not set # CONFIG_IOSCHED_DEADLINE is not set Loading arch/arm/configs/kzm9g_defconfig +1 −0 Original line number Diff line number Diff line Loading @@ -14,6 +14,7 @@ CONFIG_NAMESPACES=y CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL_SYSCALL=y CONFIG_EMBEDDED=y CONFIG_PERF_EVENTS=y CONFIG_SLAB=y CONFIG_MODULES=y CONFIG_MODULE_FORCE_LOAD=y Loading Loading
Documentation/devicetree/bindings/arm/pmu.txt +4 −0 Original line number Diff line number Diff line Loading @@ -7,8 +7,12 @@ representation in the device tree should be done as under:- Required properties: - compatible : should be one of "arm,cortex-a15-pmu" "arm,cortex-a9-pmu" "arm,cortex-a8-pmu" "arm,cortex-a7-pmu" "arm,cortex-a5-pmu" "arm,arm11mpcore-pmu" "arm,arm1176-pmu" "arm,arm1136-pmu" - interrupts : 1 combined interrupt or 1 per core. Loading
MAINTAINERS +0 −1 Original line number Diff line number Diff line Loading @@ -595,7 +595,6 @@ M: Will Deacon <will.deacon@arm.com> S: Maintained F: arch/arm/kernel/perf_event* F: arch/arm/oprofile/common.c F: arch/arm/kernel/pmu.c F: arch/arm/include/asm/pmu.h F: arch/arm/kernel/hw_breakpoint.c F: arch/arm/include/asm/hw_breakpoint.h Loading
arch/arm/Kconfig +1 −7 Original line number Diff line number Diff line Loading @@ -1179,12 +1179,6 @@ config XSCALE_PMU depends on CPU_XSCALE default y config CPU_HAS_PMU depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \ (!ARCH_OMAP3 || OMAP3_EMU) default y bool config MULTI_IRQ_HANDLER bool help Loading Loading @@ -1757,7 +1751,7 @@ config HIGHPTE config HW_PERF_EVENTS bool "Enable hardware performance counter support for perf events" depends on PERF_EVENTS && CPU_HAS_PMU depends on PERF_EVENTS default y help Enable hardware performance counter support for perf events. If Loading
arch/arm/configs/kzm9d_defconfig +1 −0 Original line number Diff line number Diff line Loading @@ -8,6 +8,7 @@ CONFIG_LOG_BUF_SHIFT=16 CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL_SYSCALL=y CONFIG_EMBEDDED=y CONFIG_PERF_EVENTS=y CONFIG_SLAB=y # CONFIG_BLK_DEV_BSG is not set # CONFIG_IOSCHED_DEADLINE is not set Loading
arch/arm/configs/kzm9g_defconfig +1 −0 Original line number Diff line number Diff line Loading @@ -14,6 +14,7 @@ CONFIG_NAMESPACES=y CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL_SYSCALL=y CONFIG_EMBEDDED=y CONFIG_PERF_EVENTS=y CONFIG_SLAB=y CONFIG_MODULES=y CONFIG_MODULE_FORCE_LOAD=y Loading