Loading sound/i2c/cs8427.c +5 −2 Original line number Diff line number Diff line Loading @@ -291,11 +291,13 @@ static void snd_cs8427_reset(struct snd_i2c_device *cs8427) { struct cs8427 *chip; unsigned long end_time; int data; int data, aes3input = 0; snd_assert(cs8427, return); chip = cs8427->private_data; snd_i2c_lock(cs8427->bus); if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) == CS8427_RXDAES3INPUT) /* AES3 bit is set */ aes3input = 1; chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK); snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, chip->regmap[CS8427_REG_CLOCKSOURCE]); Loading @@ -316,6 +318,7 @@ static void snd_cs8427_reset(struct snd_i2c_device *cs8427) } snd_i2c_lock(cs8427->bus); chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK; if (aes3input) chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT; snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, chip->regmap[CS8427_REG_CLOCKSOURCE]); Loading sound/pci/ice1712/ice1712.c +18 −15 Original line number Diff line number Diff line Loading @@ -317,7 +317,6 @@ static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val) inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ } /* * * CS8427 interface Loading Loading @@ -397,6 +396,20 @@ int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr) return 0; } static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master) { /* change CS8427 clock source too */ if (ice->cs8427) snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master); /* notify ak4524 chip as well */ if (spdif_is_master) { unsigned int i; for (i = 0; i < ice->akm_codecs; i++) { if (ice->akm[i].ops.set_rate_val) ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); } } } /* * Interrupt handler Loading Loading @@ -1857,20 +1870,8 @@ static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol, spin_unlock_irq(&ice->reg_lock); if ((oval & ICE1712_SPDIF_MASTER) != (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER)) { /* change CS8427 clock source too */ if (ice->cs8427) { snd_ice1712_cs8427_set_input_clock(ice, is_spdif_master(ice)); } /* notify ak4524 chip as well */ if (is_spdif_master(ice)) { unsigned int i; for (i = 0; i < ice->akm_codecs; i++) { if (ice->akm[i].ops.set_rate_val) ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); } } } (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER)) snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice)); return change; } Loading Loading @@ -2736,6 +2737,8 @@ static int __devinit snd_ice1712_probe(struct pci_dev *pci, } } snd_ice1712_set_input_clock_source(ice, 0); sprintf(card->longname, "%s at 0x%lx, irq %i", card->shortname, ice->port, ice->irq); Loading Loading
sound/i2c/cs8427.c +5 −2 Original line number Diff line number Diff line Loading @@ -291,11 +291,13 @@ static void snd_cs8427_reset(struct snd_i2c_device *cs8427) { struct cs8427 *chip; unsigned long end_time; int data; int data, aes3input = 0; snd_assert(cs8427, return); chip = cs8427->private_data; snd_i2c_lock(cs8427->bus); if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) == CS8427_RXDAES3INPUT) /* AES3 bit is set */ aes3input = 1; chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK); snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, chip->regmap[CS8427_REG_CLOCKSOURCE]); Loading @@ -316,6 +318,7 @@ static void snd_cs8427_reset(struct snd_i2c_device *cs8427) } snd_i2c_lock(cs8427->bus); chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK; if (aes3input) chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT; snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, chip->regmap[CS8427_REG_CLOCKSOURCE]); Loading
sound/pci/ice1712/ice1712.c +18 −15 Original line number Diff line number Diff line Loading @@ -317,7 +317,6 @@ static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val) inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ } /* * * CS8427 interface Loading Loading @@ -397,6 +396,20 @@ int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr) return 0; } static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master) { /* change CS8427 clock source too */ if (ice->cs8427) snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master); /* notify ak4524 chip as well */ if (spdif_is_master) { unsigned int i; for (i = 0; i < ice->akm_codecs; i++) { if (ice->akm[i].ops.set_rate_val) ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); } } } /* * Interrupt handler Loading Loading @@ -1857,20 +1870,8 @@ static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol, spin_unlock_irq(&ice->reg_lock); if ((oval & ICE1712_SPDIF_MASTER) != (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER)) { /* change CS8427 clock source too */ if (ice->cs8427) { snd_ice1712_cs8427_set_input_clock(ice, is_spdif_master(ice)); } /* notify ak4524 chip as well */ if (is_spdif_master(ice)) { unsigned int i; for (i = 0; i < ice->akm_codecs; i++) { if (ice->akm[i].ops.set_rate_val) ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); } } } (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER)) snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice)); return change; } Loading Loading @@ -2736,6 +2737,8 @@ static int __devinit snd_ice1712_probe(struct pci_dev *pci, } } snd_ice1712_set_input_clock_source(ice, 0); sprintf(card->longname, "%s at 0x%lx, irq %i", card->shortname, ice->port, ice->irq); Loading