Commit ed22cc93 authored by Johan Hovold's avatar Johan Hovold Committed by Bjorn Andersson
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arm64: dts: qcom: ipq8074: fix PCIe PHY serdes size 



The size of the PCIe PHY serdes register region is 0x1c4 and the
corresponding 'reg' property should specifically not include the
adjacent regions that are defined in the child node (e.g. tx and rx).

Fixes: 33057e16 ("ARM: dts: ipq8074: Add pcie nodes")
Signed-off-by: default avatarJohan Hovold <johan+linaro@kernel.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220915143431.19842-1-johan+linaro@kernel.org
parent aa510b0c

arch/arm64/boot/dts/qcom/ipq8074.dtsi

+2 −2
Original line number Original line Diff line number Diff line
@@ -199,7 +199,7 @@ qusb_phy_0: phy@79000 { 




		pcie_qmp0: phy@86000 {

		pcie_qmp0: phy@86000 {

			compatible = "qcom,ipq8074-qmp-pcie-phy";

			compatible = "qcom,ipq8074-qmp-pcie-phy";

			reg = <0x00086000 0x1000>;

			reg = <0x00086000 0x1c4>;

			#address-cells = <1>;

			#address-cells = <1>;

			#size-cells = <1>;

			#size-cells = <1>;

			ranges;

			ranges;
@@ -227,7 +227,7 @@ pcie_phy0: phy@86200 { 




		pcie_qmp1: phy@8e000 {

		pcie_qmp1: phy@8e000 {

			compatible = "qcom,ipq8074-qmp-pcie-phy";

			compatible = "qcom,ipq8074-qmp-pcie-phy";

			reg = <0x0008e000 0x1000>;

			reg = <0x0008e000 0x1c4>;

			#address-cells = <1>;

			#address-cells = <1>;

			#size-cells = <1>;

			#size-cells = <1>;

			ranges;

			ranges;