Commit ee121f7e authored by Lang Yu's avatar Lang Yu Committed by Alex Deucher
Browse files

drm/amdgpu: fix sysfs_emit/sysfs_emit_at warnings(v2) 



sysfs_emit and sysfs_emit_at requrie a page boundary
aligned buf address. Make them happy!

v2: use an inline function.

Warning Log:
[  492.545174] invalid sysfs_emit_at: buf:00000000f19bdfde at:0
[  492.546416] WARNING: CPU: 7 PID: 1304 at fs/sysfs/file.c:765 sysfs_emit_at+0x4a/0xa0
[  492.654805] Call Trace:
[  492.655353]  ? smu_cmn_get_metrics_table+0x40/0x50 [amdgpu]
[  492.656780]  vangogh_print_clk_levels+0x369/0x410 [amdgpu]
[  492.658245]  vangogh_common_print_clk_levels+0x77/0x80 [amdgpu]
[  492.659733]  ? preempt_schedule_common+0x18/0x30
[  492.660713]  smu_print_ppclk_levels+0x65/0x90 [amdgpu]
[  492.662107]  amdgpu_get_pp_od_clk_voltage+0x13d/0x190 [amdgpu]
[  492.663620]  dev_attr_show+0x1d/0x40

Signed-off-by: default avatarLang Yu <lang.yu@amd.com>
Acked-by: default avatarHuang Rui <ray.huang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5f64d9af

drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

+6 −2
Original line number Diff line number Diff line
@@ -771,8 +771,12 @@ static int arcturus_print_clk_levels(struct smu_context *smu, 
	struct smu_11_0_dpm_context *dpm_context = NULL;

	uint32_t gen_speed, lane_width;



	if (amdgpu_ras_intr_triggered())

		return sysfs_emit(buf, "unavailable\n");

	smu_cmn_get_sysfs_buf(&buf, &size);



	if (amdgpu_ras_intr_triggered()) {

		size += sysfs_emit_at(buf, size, "unavailable\n");

		return size;

	}



	dpm_context = smu_dpm->dpm_context;

drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c

+3 −1
Original line number Diff line number Diff line
@@ -1279,6 +1279,8 @@ static int navi10_print_clk_levels(struct smu_context *smu, 
	struct smu_11_0_overdrive_table *od_settings = smu->od_settings;

	uint32_t min_value, max_value;



	smu_cmn_get_sysfs_buf(&buf, &size);



	switch (clk_type) {

	case SMU_GFXCLK:

	case SMU_SCLK:
@@ -1392,7 +1394,7 @@ static int navi10_print_clk_levels(struct smu_context *smu, 
	case SMU_OD_RANGE:

		if (!smu->od_enabled || !od_table || !od_settings)

			break;

		size = sysfs_emit(buf, "%s:\n", "OD_RANGE");

		size += sysfs_emit_at(buf, size, "%s:\n", "OD_RANGE");



		if (navi10_od_feature_is_supported(od_settings, SMU_11_0_ODCAP_GFXCLK_LIMITS)) {

			navi10_od_setting_get_range(od_settings, SMU_11_0_ODSETTING_GFXCLKFMIN,

drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

+3 −1
Original line number Diff line number Diff line
@@ -1058,6 +1058,8 @@ static int sienna_cichlid_print_clk_levels(struct smu_context *smu, 
	uint32_t min_value, max_value;

	uint32_t smu_version;



	smu_cmn_get_sysfs_buf(&buf, &size);



	switch (clk_type) {

	case SMU_GFXCLK:

	case SMU_SCLK:
@@ -1180,7 +1182,7 @@ static int sienna_cichlid_print_clk_levels(struct smu_context *smu, 
		if (!smu->od_enabled || !od_table || !od_settings)

			break;



		size = sysfs_emit(buf, "%s:\n", "OD_RANGE");

		size += sysfs_emit_at(buf, size, "%s:\n", "OD_RANGE");



		if (sienna_cichlid_is_od_feature_supported(od_settings, SMU_11_0_7_ODCAP_GFXCLK_LIMITS)) {

			sienna_cichlid_get_od_setting_range(od_settings, SMU_11_0_7_ODSETTING_GFXCLKFMIN,

drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c

+10 −6
Original line number Diff line number Diff line
@@ -589,10 +589,12 @@ static int vangogh_print_legacy_clk_levels(struct smu_context *smu, 
	if (ret)

		return ret;



	smu_cmn_get_sysfs_buf(&buf, &size);



	switch (clk_type) {

	case SMU_OD_SCLK:

		if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) {

			size = sysfs_emit(buf, "%s:\n", "OD_SCLK");

			size += sysfs_emit_at(buf, size, "%s:\n", "OD_SCLK");

			size += sysfs_emit_at(buf, size, "0: %10uMhz\n",

			(smu->gfx_actual_hard_min_freq > 0) ? smu->gfx_actual_hard_min_freq : smu->gfx_default_hard_min_freq);

			size += sysfs_emit_at(buf, size, "1: %10uMhz\n",
@@ -601,7 +603,7 @@ static int vangogh_print_legacy_clk_levels(struct smu_context *smu, 
		break;

	case SMU_OD_CCLK:

		if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) {

			size = sysfs_emit(buf, "CCLK_RANGE in Core%d:\n",  smu->cpu_core_id_select);

			size += sysfs_emit_at(buf, size, "CCLK_RANGE in Core%d:\n",  smu->cpu_core_id_select);

			size += sysfs_emit_at(buf, size, "0: %10uMhz\n",

			(smu->cpu_actual_soft_min_freq > 0) ? smu->cpu_actual_soft_min_freq : smu->cpu_default_soft_min_freq);

			size += sysfs_emit_at(buf, size, "1: %10uMhz\n",
@@ -610,7 +612,7 @@ static int vangogh_print_legacy_clk_levels(struct smu_context *smu, 
		break;

	case SMU_OD_RANGE:

		if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) {

			size = sysfs_emit(buf, "%s:\n", "OD_RANGE");

			size += sysfs_emit_at(buf, size, "%s:\n", "OD_RANGE");

			size += sysfs_emit_at(buf, size, "SCLK: %7uMhz %10uMhz\n",

				smu->gfx_default_hard_min_freq, smu->gfx_default_soft_max_freq);

			size += sysfs_emit_at(buf, size, "CCLK: %7uMhz %10uMhz\n",
@@ -688,10 +690,12 @@ static int vangogh_print_clk_levels(struct smu_context *smu, 
	if (ret)

		return ret;



	smu_cmn_get_sysfs_buf(&buf, &size);



	switch (clk_type) {

	case SMU_OD_SCLK:

		if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) {

			size = sysfs_emit(buf, "%s:\n", "OD_SCLK");

			size += sysfs_emit_at(buf, size, "%s:\n", "OD_SCLK");

			size += sysfs_emit_at(buf, size, "0: %10uMhz\n",

			(smu->gfx_actual_hard_min_freq > 0) ? smu->gfx_actual_hard_min_freq : smu->gfx_default_hard_min_freq);

			size += sysfs_emit_at(buf, size, "1: %10uMhz\n",
@@ -700,7 +704,7 @@ static int vangogh_print_clk_levels(struct smu_context *smu, 
		break;

	case SMU_OD_CCLK:

		if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) {

			size = sysfs_emit(buf, "CCLK_RANGE in Core%d:\n",  smu->cpu_core_id_select);

			size += sysfs_emit_at(buf, size, "CCLK_RANGE in Core%d:\n",  smu->cpu_core_id_select);

			size += sysfs_emit_at(buf, size, "0: %10uMhz\n",

			(smu->cpu_actual_soft_min_freq > 0) ? smu->cpu_actual_soft_min_freq : smu->cpu_default_soft_min_freq);

			size += sysfs_emit_at(buf, size, "1: %10uMhz\n",
@@ -709,7 +713,7 @@ static int vangogh_print_clk_levels(struct smu_context *smu, 
		break;

	case SMU_OD_RANGE:

		if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) {

			size = sysfs_emit(buf, "%s:\n", "OD_RANGE");

			size += sysfs_emit_at(buf, size, "%s:\n", "OD_RANGE");

			size += sysfs_emit_at(buf, size, "SCLK: %7uMhz %10uMhz\n",

				smu->gfx_default_hard_min_freq, smu->gfx_default_soft_max_freq);

			size += sysfs_emit_at(buf, size, "CCLK: %7uMhz %10uMhz\n",

drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c

+2 −0
Original line number Diff line number Diff line
@@ -497,6 +497,8 @@ static int renoir_print_clk_levels(struct smu_context *smu, 
	if (ret)

		return ret;



	smu_cmn_get_sysfs_buf(&buf, &size);



	switch (clk_type) {

	case SMU_OD_RANGE:

		if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) {