Commit ef30f441 authored by Wenjing Liu's avatar Wenjing Liu Committed by Alex Deucher
Browse files

drm/amd/display: define link res and make it accessible to all link interfaces 



[why]
There will be a series of re-arch changes in Link Resource Management.
They are more and more muxable link resource objects and the resource is
insufficient for a one to one allocation to all links created.
Therefore a link resource sharing logic is required to determine which
link should use certain link resource.

This commit is the first one in this series that starts by defining a
link resource struct, this struct will be available to all interfaces
that need to perform link programming sequence.

In later commits, we will granduately decouple link resource objects out
of dc link. So instead of access a link resource from dc link. Current
link's resource can be accessible through pipe_ctx->link_res during
commit, or by calling  dc_link_get_cur_link_res function with current
link passed in after commit.

Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: default avatarJun Lei <Jun.Lei@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarWenjing Liu <wenjing.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 19afe66d

drivers/gpu/drm/amd/display/dc/core/dc_link.c

+50 −19
Original line number Diff line number Diff line
@@ -986,7 +986,7 @@ static bool dc_link_detect_helper(struct dc_link *link, 
				 * empty which leads to allocate_mst_payload() has "0"

				 * pbn_per_slot value leading to exception on dc_fixpt_div()

				 */

				dp_verify_mst_link_cap(link);

				dp_verify_mst_link_cap(link, NULL);



				/*

				 * This call will initiate MST topology discovery. Which
@@ -1150,6 +1150,7 @@ static bool dc_link_detect_helper(struct dc_link *link, 
			// verify link cap for SST non-seamless boot

			if (!perform_dp_seamless_boot)

				dp_verify_link_cap_with_retries(link,

								NULL,

								&link->reported_link_cap,

								LINK_TRAINING_MAX_VERIFY_RETRY);

		} else {
@@ -2503,7 +2504,8 @@ static void write_i2c_redriver_setting( 
		DC_LOG_DEBUG("Set redriver failed");

}



static void disable_link(struct dc_link *link, enum signal_type signal)

static void disable_link(struct dc_link *link, const struct link_resource *link_res,

		enum signal_type signal)

{

	/*

	 * TODO: implement call for dp_set_hw_test_pattern
@@ -2522,20 +2524,20 @@ static void disable_link(struct dc_link *link, enum signal_type signal) 
		struct dc_link_settings link_settings = link->cur_link_settings;

#endif

		if (dc_is_dp_sst_signal(signal))

			dp_disable_link_phy(link, signal);

			dp_disable_link_phy(link, link_res, signal);

		else

			dp_disable_link_phy_mst(link, signal);

			dp_disable_link_phy_mst(link, link_res, signal);



		if (dc_is_dp_sst_signal(signal) ||

				link->mst_stream_alloc_table.stream_count == 0) {

#if defined(CONFIG_DRM_AMD_DC_DCN)

			if (dp_get_link_encoding_format(&link_settings) == DP_8b_10b_ENCODING) {

				dp_set_fec_enable(link, false);

				dp_set_fec_ready(link, false);

				dp_set_fec_ready(link, link_res, false);

			}

#else

			dp_set_fec_enable(link, false);

			dp_set_fec_ready(link, false);

			dp_set_fec_ready(link, link_res, false);

#endif

		}

	} else {
@@ -2646,7 +2648,7 @@ static enum dc_status enable_link( 
	 * new link settings.

	 */

	if (link->link_status.link_active) {

		disable_link(link, pipe_ctx->stream->signal);

		disable_link(link, &pipe_ctx->link_res, pipe_ctx->stream->signal);

	}



	switch (pipe_ctx->stream->signal) {
@@ -4109,7 +4111,7 @@ static void fpga_dp_hpo_enable_link_and_stream(struct dc_state *state, struct pi 
	stream->link->cur_link_settings = link_settings;



	/*  Enable clock, Configure lane count, and Enable Link Encoder*/

	enable_dp_hpo_output(stream->link, &stream->link->cur_link_settings);

	enable_dp_hpo_output(stream->link, &pipe_ctx->link_res, &stream->link->cur_link_settings);



#ifdef DIAGS_BUILD

	/* Workaround for FPGA HPO capture DP link data:
@@ -4353,7 +4355,8 @@ void core_link_enable_stream( 
			if (status != DC_FAIL_DP_LINK_TRAINING ||

					pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {

				if (false == stream->link->link_status.link_active)

					disable_link(stream->link, pipe_ctx->stream->signal);

					disable_link(stream->link, &pipe_ctx->link_res,

							pipe_ctx->stream->signal);

				BREAK_TO_DEBUGGER();

				return;

			}
@@ -4502,14 +4505,14 @@ void core_link_disable_stream(struct pipe_ctx *pipe_ctx) 
		 * state machine.

		 * In DP2 or MST mode, our encoder will stay video active

		 */

		disable_link(pipe_ctx->stream->link, pipe_ctx->stream->signal);

		disable_link(pipe_ctx->stream->link, &pipe_ctx->link_res, pipe_ctx->stream->signal);

		dc->hwss.disable_stream(pipe_ctx);

	} else {

		dc->hwss.disable_stream(pipe_ctx);

		disable_link(pipe_ctx->stream->link, pipe_ctx->stream->signal);

		disable_link(pipe_ctx->stream->link, &pipe_ctx->link_res, pipe_ctx->stream->signal);

	}

#else

	disable_link(pipe_ctx->stream->link, pipe_ctx->stream->signal);

	disable_link(pipe_ctx->stream->link, &pipe_ctx->link_res, pipe_ctx->stream->signal);



	dc->hwss.disable_stream(pipe_ctx);

#endif
@@ -4592,16 +4595,22 @@ void dc_link_set_drive_settings(struct dc *dc, 
{



	int i;

	struct pipe_ctx *pipe = NULL;

	const struct link_resource *link_res;



	for (i = 0; i < dc->link_count; i++) {

		if (dc->links[i] == link)

	link_res = dc_link_get_cur_link_res(link);



	for (i = 0; i < MAX_PIPES; i++) {

		pipe = &dc->current_state->res_ctx.pipe_ctx[i];

		if (pipe->stream && pipe->stream->link) {

			if (pipe->stream->link == link)

				break;

		}



	if (i >= dc->link_count)

	}

	if (pipe && link_res)

		dc_link_dp_set_drive_settings(pipe->stream->link, link_res, lt_settings);

	else

		ASSERT_CRITICAL(false);



	dc_link_dp_set_drive_settings(dc->links[i], lt_settings);

}



void dc_link_set_preferred_link_settings(struct dc *dc,
@@ -4793,6 +4802,9 @@ void dc_link_overwrite_extended_receiver_cap( 


bool dc_link_is_fec_supported(const struct dc_link *link)

{

	/* TODO - use asic cap instead of link_enc->features

	 * we no longer know which link enc to use for this link before commit

	 */

	struct link_encoder *link_enc = NULL;



	/* Links supporting dynamically assigned link encoder will be assigned next
@@ -4887,3 +4899,22 @@ uint32_t dc_bandwidth_in_kbps_from_timing( 
	return kbps;



}



const struct link_resource *dc_link_get_cur_link_res(const struct dc_link *link)

{

	int i;

	struct pipe_ctx *pipe = NULL;

	const struct link_resource *link_res = NULL;



	for (i = 0; i < MAX_PIPES; i++) {

		pipe = &link->dc->current_state->res_ctx.pipe_ctx[i];

		if (pipe->stream && pipe->stream->link && pipe->top_pipe == NULL) {

			if (pipe->stream->link == link) {

				link_res = &pipe->link_res;

				break;

			}

		}

	}



	return link_res;

}

drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c

+91 −61

File changed.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/amd/display/dc/core/dc_link_dpia.c

+32 −16

File changed.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c

+20 −10

File changed.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/amd/display/dc/dc_link.h

+8 −0
Original line number Diff line number Diff line
@@ -30,6 +30,8 @@ 
#include "dc_types.h"

#include "grph_object_defs.h"



struct link_resource;



enum dc_link_fec_state {

	dc_link_fec_not_ready,

	dc_link_fec_ready,
@@ -359,14 +361,17 @@ void dc_link_remove_remote_sink( 


void dc_link_dp_set_drive_settings(

	struct dc_link *link,

	const struct link_resource *link_res,

	struct link_training_settings *lt_settings);



bool dc_link_dp_perform_link_training_skip_aux(

	struct dc_link *link,

	const struct link_resource *link_res,

	const struct dc_link_settings *link_setting);



enum link_training_result dc_link_dp_perform_link_training(

	struct dc_link *link,

	const struct link_resource *link_res,

	const struct dc_link_settings *link_settings,

	bool skip_video_pattern);
@@ -374,6 +379,7 @@ bool dc_link_dp_sync_lt_begin(struct dc_link *link); 


enum link_training_result dc_link_dp_sync_lt_attempt(

	struct dc_link *link,

	const struct link_resource *link_res,

	struct dc_link_settings *link_setting,

	struct dc_link_training_overrides *lt_settings);
@@ -454,4 +460,6 @@ bool dc_link_should_enable_fec(const struct dc_link *link); 
uint32_t dc_link_bw_kbps_from_raw_frl_link_rate_data(uint8_t bw);

enum dp_link_encoding dc_link_dp_mst_decide_link_encoding_format(const struct dc_link *link);

#endif



const struct link_resource *dc_link_get_cur_link_res(const struct dc_link *link);

#endif /* DC_LINK_H_ */