Commit f178754e authored by Sergio Paracuellos's avatar Sergio Paracuellos Committed by Greg Kroah-Hartman
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staging: mt7621-dts: set up only two pcie phys 



This soc has only two real pcie phys one of them
having a different register to enable and disable it.
Change this to have only two dt nodes for the phys and
use 'phy-cells' properly to say if the phy has dual ports.

Signed-off-by: default avatarSergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20200320110123.9907-3-sergio.paracuellos@gmail.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent c685dba6

drivers/staging/mt7621-dts/mt7621.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -535,8 +535,8 @@ pcie: pcie@1e140000 { 
		reset-names = "pcie0", "pcie1", "pcie2";

		clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>;

		clock-names = "pcie0", "pcie1", "pcie2";

		phys = <&pcie0_phy 0>, <&pcie0_phy 1>, <&pcie1_phy 0>;

		phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2";

		phys = <&pcie0_phy 1>, <&pcie2_phy 0>;

		phy-names = "pcie-phy0", "pcie-phy2";



		reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>,

				<&gpio 8 GPIO_ACTIVE_LOW>,
@@ -573,7 +573,7 @@ pcie0_phy: pcie-phy@1e149000 { 
		#phy-cells = <1>;

	};



	pcie1_phy: pcie-phy@1e14a000 {

	pcie2_phy: pcie-phy@1e14a000 {

		compatible = "mediatek,mt7621-pci-phy";

		reg = <0x1e14a000 0x0700>;

		#phy-cells = <1>;