Commit f1aebf5e authored by Oded Gabbay's avatar Oded Gabbay
Browse files

habanalabs: update to latest hl_boot_if.h spec from F/W 



It adds the definition for indication that the F/W handles HBM ECC
events.

Signed-off-by: default avatarOded Gabbay <ogabbay@kernel.org>
parent 230cd894

drivers/misc/habanalabs/include/common/hl_boot_if.h

+7 −1
Original line number Diff line number Diff line
@@ -69,8 +69,9 @@ 
 *					image has failed to match expected

 *					checksum. Trying to program image again

 *					might solve this.

 *

 * CPU_BOOT_ERR0_PLL_FAIL		PLL settings failed, meaning that one

 *					of the PLLs remained in REF_CLK

 *					of the PLLs remains in REF_CLK

 *

 * CPU_BOOT_ERR0_ENABLED		Error registers enabled.

 *					This is a main indication that the
@@ -161,6 +162,10 @@ 
 *					FW initialized Clock Gating.

 *					Initialized in: preboot

 *

 * CPU_BOOT_DEV_STS0_HBM_ECC_EN		HBM ECC handling Enabled.

 *					FW handles HBM ECC indications.

 *					Initialized in: linux

 *

 * CPU_BOOT_DEV_STS0_ENABLED		Device status register enabled.

 *					This is a main indication that the

 *					running FW populates the device status
@@ -184,6 +189,7 @@ 
#define CPU_BOOT_DEV_STS0_PLL_INFO_EN			(1 << 11)

#define CPU_BOOT_DEV_STS0_SP_SRAM_EN			(1 << 12)

#define CPU_BOOT_DEV_STS0_CLK_GATE_EN			(1 << 13)

#define CPU_BOOT_DEV_STS0_HBM_ECC_EN			(1 << 14)

#define CPU_BOOT_DEV_STS0_ENABLED			(1 << 31)



enum cpu_boot_status {