Commit f34e8875 authored by Dinh Nguyen's avatar Dinh Nguyen
Browse files

dt-bindings: spi: cadence-quadspi: document "intel,socfpga-qspi"



The QSPI controller on Intel's SoCFPGA platform does not implement the
CQSPI_REG_WR_COMPLETION_CTRL register, thus a write to this register
results in a crash.

Introduce the dts compatible "intel,socfpga-qspi" to differentiate the
hardware.

Acked-by: default avatarPratyush Yadav <p.yadav@ti.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarDinh Nguyen <dinguyen@kernel.org>
---
v3: revert to "intel,socfpga-qspi"
v2: change binding to "cdns,qspi-nor-0010" to be more generic for other
    platforms
parent fc74e0a4
Loading
Loading
Loading
Loading
+1 −0
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ properties:
              - ti,am654-ospi
              - intel,lgm-qspi
              - xlnx,versal-ospi-1.0
              - intel,socfpga-qspi
          - const: cdns,qspi-nor
      - const: cdns,qspi-nor