Commit f37753e2 authored by Stephen Boyd's avatar Stephen Boyd Committed by Michael Turquette
Browse files

Merge branch 'clk-fixes' into clk-next 

* clk-fixes:
  clk: stm32f4: fix: exclude values 0 and 1 for PLLQ
parents 4641d6a5 ef189104

drivers/clk/clk-stm32f4.c

+10 −3
Original line number Diff line number Diff line
@@ -429,6 +429,13 @@ static const struct clk_div_table pll_divp_table[] = { 
	{ 0, 2 }, { 1, 4 }, { 2, 6 }, { 3, 8 }, { 0 }

};



static const struct clk_div_table pll_divq_table[] = {

	{ 2, 2 }, { 3, 3 }, { 4, 4 }, { 5, 5 }, { 6, 6 }, { 7, 7 },

	{ 8, 8 }, { 9, 9 }, { 10, 10 }, { 11, 11 }, { 12, 12 }, { 13, 13 },

	{ 14, 14 }, { 15, 15 },

	{ 0 }

};



static const struct clk_div_table pll_divr_table[] = {

	{ 2, 2 }, { 3, 3 }, { 4, 4 }, { 5, 5 }, { 6, 6 }, { 7, 7 }, { 0 }

};
@@ -497,7 +504,7 @@ struct stm32f4_div_data { 
#define MAX_PLL_DIV 3

static const struct stm32f4_div_data  div_data[MAX_PLL_DIV] = {

	{ 16, 2, 0, pll_divp_table },

	{ 24, 4, CLK_DIVIDER_ONE_BASED, NULL		},

	{ 24, 4, 0, pll_divq_table },

	{ 28, 3, 0, pll_divr_table },

};