Commit f6c35df2 authored by Steven Lee's avatar Steven Lee Committed by Bartosz Golaszewski
Browse files

gpio: gpio-aspeed-sgpio: Fix wrong hwirq in irq handler. 



The current hwirq is calculated based on the old GPIO pin order(input
GPIO range is from 0 to ngpios - 1).
It should be calculated based on the current GPIO input pin order(input
GPIOs are 0, 2, 4, ..., (ngpios - 1) * 2).

Signed-off-by: default avatarSteven Lee <steven_lee@aspeedtech.com>
Signed-off-by: default avatarBartosz Golaszewski <brgl@bgdev.pl>
parent 2dd824cc

drivers/gpio/gpio-aspeed-sgpio.c

+1 −1
Original line number Diff line number Diff line
@@ -395,7 +395,7 @@ static void aspeed_sgpio_irq_handler(struct irq_desc *desc) 
		reg = ioread32(bank_reg(data, bank, reg_irq_status));



		for_each_set_bit(p, &reg, 32)

			generic_handle_domain_irq(gc->irq.domain, i * 32 + p);

			generic_handle_domain_irq(gc->irq.domain, i * 32 + p * 2);

	}



	chained_irq_exit(ic, desc);