Merge branches 'edac-spr', 'edac-igen6' and 'edac-misc' into edac-updates-for-v5.11 (f84b7999) · Commits · jan.koester / Linux

MAINTAINERS

+9 −2

Original line number	Diff line number	Diff line
		@@ -2474,7 +2474,7 @@ F: drivers/clk/socfpga/
		ARM/SOCFPGA EDAC SUPPORT
		M: Dinh Nguyen <dinguyen@kernel.org>
		S: Maintained
		F: drivers/edac/altera_edac.
		F: drivers/edac/altera_edac.[ch]

		ARM/SPREADTRUM SoC SUPPORT
		M: Orson Zhai <orsonzhai@gmail.com>
		@@ -6351,6 +6351,13 @@ L: linux-edac@vger.kernel.org
		S: Maintained
		F: drivers/edac/ie31200_edac.c

		EDAC-IGEN6
		M: Tony Luck <tony.luck@intel.com>
		R: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
		L: linux-edac@vger.kernel.org
		S: Maintained
		F: drivers/edac/igen6_edac.c

		EDAC-MPC85XX
		M: Johannes Thumshirn <morbidrsa@gmail.com>
		L: linux-edac@vger.kernel.org
		@@ -6400,7 +6407,7 @@ EDAC-SKYLAKE
		M: Tony Luck <tony.luck@intel.com>
		L: linux-edac@vger.kernel.org
		S: Maintained
		F: drivers/edac/skx_*.c
		F: drivers/edac/skx_*.[ch]

		EDAC-TI
		M: Tero Kristo <t-kristo@ti.com>

drivers/edac/Kconfig

+9 −0

Original line number	Diff line number	Diff line
		@@ -269,6 +269,15 @@ config EDAC_PND2
		first used on the Apollo Lake platform and Denverton
		micro-server but may appear on others in the future.

		config EDAC_IGEN6
		tristate "Intel client SoC Integrated MC"
		depends on PCI && X86_64 && PCI_MMCONFIG && ARCH_HAVE_NMI_SAFE_CMPXCHG
		help
		Support for error detection and correction on the Intel
		client SoC Integrated Memory Controller using In-Band ECC IP.
		This In-Band ECC is first used on the Elkhart Lake SoC but
		may appear on others in the future.

		config EDAC_MPC85XX
		bool "Freescale MPC83xx / MPC85xx"
		depends on FSL_SOC && EDAC=y

drivers/edac/Makefile

+1 −0

Original line number	Diff line number	Diff line
		@@ -32,6 +32,7 @@ obj-$(CONFIG_EDAC_I7300) += i7300_edac.o
		obj-$(CONFIG_EDAC_I7CORE) += i7core_edac.o
		obj-$(CONFIG_EDAC_SBRIDGE) += sb_edac.o
		obj-$(CONFIG_EDAC_PND2) += pnd2_edac.o
		obj-$(CONFIG_EDAC_IGEN6) += igen6_edac.o
		obj-$(CONFIG_EDAC_E7XXX) += e7xxx_edac.o
		obj-$(CONFIG_EDAC_E752X) += e752x_edac.o
		obj-$(CONFIG_EDAC_I82443BXGX) += i82443bxgx_edac.o

drivers/edac/amd64_edac.c

+14 −20

Original line number	Diff line number	Diff line
		@@ -18,6 +18,9 @@ static struct amd64_family_type *fam_type;
		/* Per-node stuff */
		static struct ecc_settings **ecc_stngs;

		/* Device for the PCI component */
		static struct device *pci_ctl_dev;

		/*
		* Valid scrub rates for the K8 hardware memory scrubber. We map the scrubbing
		* bandwidth to a valid bit pattern. The 'set' operation finds the 'matching-
		@@ -2461,14 +2464,11 @@ static int map_err_sym_to_channel(int err_sym, int sym_size)
		case 0x20:
		case 0x21:
		return 0;
		break;
		case 0x22:
		case 0x23:
		return 1;
		break;
		default:
		return err_sym >> 4;
		break;
		}
		/* x8 symbols */
		else
		@@ -2478,17 +2478,12 @@ static int map_err_sym_to_channel(int err_sym, int sym_size)
		WARN(1, KERN_ERR "Invalid error symbol: 0x%x\n",
		err_sym);
		return -1;
		break;

		case 0x11:
		return 0;
		break;
		case 0x12:
		return 1;
		break;
		default:
		return err_sym >> 3;
		break;
		}
		return -1;
		}
		@@ -2683,6 +2678,9 @@ reserve_mc_sibling_devs(struct amd64_pvt *pvt, u16 pci_id1, u16 pci_id2)
		return -ENODEV;
		}

		if (!pci_ctl_dev)
		pci_ctl_dev = &pvt->F0->dev;

		edac_dbg(1, "F0: %s\n", pci_name(pvt->F0));
		edac_dbg(1, "F3: %s\n", pci_name(pvt->F3));
		edac_dbg(1, "F6: %s\n", pci_name(pvt->F6));
		@@ -2707,6 +2705,9 @@ reserve_mc_sibling_devs(struct amd64_pvt *pvt, u16 pci_id1, u16 pci_id2)
		return -ENODEV;
		}

		if (!pci_ctl_dev)
		pci_ctl_dev = &pvt->F2->dev;

		edac_dbg(1, "F1: %s\n", pci_name(pvt->F1));
		edac_dbg(1, "F2: %s\n", pci_name(pvt->F2));
		edac_dbg(1, "F3: %s\n", pci_name(pvt->F3));
		@@ -3623,21 +3624,10 @@ static void remove_one_instance(unsigned int nid)

		static void setup_pci_device(void)
		{
		struct mem_ctl_info *mci;
		struct amd64_pvt *pvt;

		if (pci_ctl)
		return;

		mci = edac_mc_find(0);
		if (!mci)
		return;

		pvt = mci->pvt_info;
		if (pvt->umc)
		pci_ctl = edac_pci_create_generic_ctl(&pvt->F0->dev, EDAC_MOD_STR);
		else
		pci_ctl = edac_pci_create_generic_ctl(&pvt->F2->dev, EDAC_MOD_STR);
		pci_ctl = edac_pci_create_generic_ctl(pci_ctl_dev, EDAC_MOD_STR);
		if (!pci_ctl) {
		pr_warn("%s(): Unable to create PCI control\n", __func__);
		pr_warn("%s(): PCI error report via EDAC not set\n", __func__);
		@@ -3716,6 +3706,8 @@ static int __init amd64_edac_init(void)
		return 0;

		err_pci:
		pci_ctl_dev = NULL;

		msrs_free(msrs);
		msrs = NULL;

		@@ -3745,6 +3737,8 @@ static void __exit amd64_edac_exit(void)
		kfree(ecc_stngs);
		ecc_stngs = NULL;

		pci_ctl_dev = NULL;

		msrs_free(msrs);
		msrs = NULL;
		}

drivers/edac/amd76x_edac.c

+0 −1

Original line number	Diff line number	Diff line
		@@ -179,7 +179,6 @@ static int amd76x_process_error_info(struct mem_ctl_info *mci,
		static void amd76x_check(struct mem_ctl_info *mci)
		{
		struct amd76x_error_info info;
		edac_dbg(3, "\n");
		amd76x_get_error_info(mci, &info);
		amd76x_process_error_info(mci, &info, 1);
		}