Commit f9228c38 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'arm-soc/for-4.19/devicetree-arm64' of https://github.com/Broadcom/stblinux into next/dt 

This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 4.19, please pull the following:

- Scott does a bunch of updates to the Stingray DTS and DTS include
  files to better support the addition of new boards. Scott also adds
  the Stingray OTP Device Tree node

- Pramod updates the Stingray clocks such that they match the latest
  revision of the ASIC and datasheets

- Ray sets the Stingray initial watchdog timeout to 60 seconds to give
  sufficient time for the kernel to boot and then adds PAXC (internal
  PCIe) support to the Stingray base DTS files

- Vladimir adds support for the Stingray smart NIC PS225 boards variants

* tag 'arm-soc/for-4.19/devicetree-arm64' of https://github.com/Broadcom/stblinux

:
  arm64: dts: stingray: add bcm958802a802x dts
  arm64: dts: stingray: add PAXC support
  arm64: dts: set initial SR watchdog timeout to 60 seconds
  arm64: dts: Update Stingray clock DT nodes
  arm64: dts: stingray: Add OTP device node
  arm64: dts: stingray: move common board components to stingray-board-base

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents c79306d5 e28e6816

arch/arm64/boot/dts/broadcom/stingray/Makefile

+2 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

dtb-$(CONFIG_ARCH_BCM_IPROC) += bcm958742k.dtb

dtb-$(CONFIG_ARCH_BCM_IPROC) += bcm958742t.dtb



dtb-$(CONFIG_ARCH_BCM_IPROC) += bcm958802a802x.dtb

arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi

+1 −34
Original line number Diff line number Diff line
@@ -30,20 +30,9 @@ 
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 */



#include "stingray.dtsi"

#include "stingray-board-base.dtsi"



/ {

	chosen {

		stdout-path = "serial0:115200n8";

	};



	aliases {

		serial0 = &uart1;

		serial1 = &uart0;

		serial2 = &uart2;

		serial3 = &uart3;

	};



	sdio0_vddo_ctrl_reg: sdio0_vddo_ctrl {

		compatible = "regulator-gpio";

		regulator-name = "sdio0_vddo_ctrl_reg";
@@ -67,11 +56,6 @@ sdio1_vddo_ctrl_reg: sdio1_vddo_ctrl { 
	};

};



&memory { /* Default DRAM banks */

	reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */

	      <0x00000008 0x80000000 0x1 0x80000000>; /* 6G @ 34G */

};



&sata0 {

	status = "okay";

};
@@ -136,18 +120,6 @@ &sata_phy7{ 
	status = "okay";

};



&mdio_mux_iproc {

	mdio@10 {

		gphy0: eth-phy@10 {

			reg = <0x10>;

		};

	};

};



&uart1 {

	status = "okay";

};



&pwm {

	status = "okay";

};
@@ -175,8 +147,6 @@ pcf8574: pcf8574@20 { 
};



&enet {

	phy-mode = "rgmii-id";

	phy-handle = <&gphy0>;

	status = "okay";

};
@@ -197,13 +167,10 @@ nandcs@0 { 


&sdio0 {

	vqmmc-supply = <&sdio0_vddo_ctrl_reg>;

	non-removable;

	full-pwr-cycle;

	status = "okay";

};



&sdio1 {

	vqmmc-supply = <&sdio1_vddo_ctrl_reg>;

	full-pwr-cycle;

	status = "okay";

};

arch/arm64/boot/dts/broadcom/stingray/bcm958802a802x.dts

0 → 100644
+26 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0 or BSD-3-Clause)

/*

 *Copyright(c) 2018 Broadcom

 */



/dts-v1/;



#include "stingray-board-base.dtsi"



/ {

	compatible = "brcm,bcm958802a802x", "brcm,stingray";

	model = "Stingray PS225xx (BCM958802A802x)";

};



&enet {

	status = "disabled";

};



&sdio0 {

	no-1-8-v;

	status = "okay";

};



&uart0 {

	status = "okay";

};

arch/arm64/boot/dts/broadcom/stingray/stingray-board-base.dtsi

0 → 100644
+51 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0 or BSD-3-Clause)

/*

 *  Copyright(c) 2016-2018 Broadcom

 */



#include "stingray.dtsi"

#include <dt-bindings/gpio/gpio.h>



/ {

	aliases {

		serial0 = &uart1;

		serial1 = &uart0;

		serial2 = &uart2;

		serial3 = &uart3;

	};



	chosen {

		stdout-path = "serial0:115200n8";

	};

};



&memory { /* Default DRAM banks */

	reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */

	      <0x00000008 0x80000000 0x1 0x80000000>; /* 6G @ 34G */

};



&enet {

	phy-mode = "rgmii-id";

	phy-handle = <&gphy0>;

};



&uart1 {

	status = "okay";

};



&sdio0 {

	non-removable;

	full-pwr-cycle;

};



&sdio1 {

	full-pwr-cycle;

};



&mdio_mux_iproc {

	mdio@10 {

		gphy0: eth-phy@10 {

			reg = <0x10>;

		};

	};

};

arch/arm64/boot/dts/broadcom/stingray/stingray-clock.dtsi

+19 −7
Original line number Diff line number Diff line
@@ -52,12 +52,24 @@ genpll0: genpll0@1d104 { 
			reg = <0x0001d104 0x32>,

			      <0x0001c854 0x4>;

			clocks = <&osc>;

			clock-output-names = "genpll0", "clk_125", "clk_scr",

			clock-output-names = "genpll0", "clk_125m", "clk_scr",

					     "clk_250", "clk_pcie_axi",

					     "clk_paxc_axi_x2",

					     "clk_paxc_axi";

		};



		genpll2: genpll2@1d1ac {

			#clock-cells = <1>;

			compatible = "brcm,sr-genpll2";

			reg = <0x0001d1ac 0x32>,

			      <0x0001c854 0x4>;

			clocks = <&osc>;

			clock-output-names = "genpll2", "clk_nic",

					     "clk_ts_500_ref", "clk_125_nitro",

					     "clk_chimp", "clk_nic_flash",

					     "clk_fs";

		};



		genpll3: genpll3@1d1e0 {

			#clock-cells = <1>;

			compatible = "brcm,sr-genpll3";
@@ -75,8 +87,8 @@ genpll4: genpll4@1d214 { 
			      <0x0001c854 0x4>;

			clocks = <&osc>;

			clock-output-names = "genpll4", "clk_ccn",

					     "clk_tpiu_pll", "noc_clk",

					     "pll_chclk_fs4",

					     "clk_tpiu_pll", "clk_noc",

					     "clk_chclk_fs4",

					     "clk_bridge_fscpu";

		};
@@ -86,8 +98,8 @@ genpll5: genpll5@1d248 { 
			reg = <0x0001d248 0x32>,

			      <0x0001c870 0x4>;

			clocks = <&osc>;

			clock-output-names = "genpll5", "fs4_hf_clk",

					     "crypto_ae_clk", "raid_ae_clk";

			clock-output-names = "genpll5", "clk_fs4_hf",

					     "clk_crypto_ae", "clk_raid_ae";

		};



		lcpll0: lcpll0@1d0c4 {
@@ -107,9 +119,9 @@ lcpll1: lcpll1@1d138 { 
			reg = <0x0001d138 0x3c>,

			      <0x0001c870 0x4>;

			clocks = <&osc>;

			clock-output-names = "lcpll1", "clk_wanpn",

			clock-output-names = "lcpll1", "clk_wan",

					     "clk_usb_ref",

					     "timesync_evt_clk";

					     "clk_crmu_ts";

		};



		hsls_clk: hsls_clk {