Unverified Commit f97ee3e9 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'renesas-arm-dt-for-v5.16-tag2' of... 

Merge tag 'renesas-arm-dt-for-v5.16-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.16 (take two)

  - SPI Multi I/O Bus, SDHI, and Ethernet support for the RZ/G2L SoC,
  - SPI Multi I/O Bus, camera, and video-on support for the R-Car V3U
    SoC,
  - SPI FLASH support for the Falcon development board,
  - eMMC, microSD, and Ethernet support for the RZ/G2L SMARC EVK
    development board,
  - 2 GHz High-Performance support for the R-Car H3e-2G, M3e-2G, and
    M3Ne-2G SoCs,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.16-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  mailmap: Fix text encoding for Niklas Söderlund
  arm64: dts: renesas: rcar-gen3e: Add Cortex-A57 2 GHz opps
  arm64: dts: renesas: rzg2l-smarc-som: Enable Ethernet
  arm64: dts: renesas: r9a07g044: Add GbEthernet nodes
  arm64: dts: renesas: Add ports node to all adv7482 nodes
  arm64: dts: renesas: r8a779a0: Add and connect all CSI-2, ISP and VIN nodes
  arm64: dts: renesas: rzg2l-smarc: Enable microSD on SMARC platform
  arm64: dts: renesas: rzg2l-smarc-som: Enable eMMC on SMARC platform
  arm64: dts: renesas: r9a07g044: Add SDHI nodes
  arm64: dts: renesas: falcon-cpu: Add SPI flash via RPC
  arm64: dts: renesas: r8a779a0: Add RPC node
  arm64: dts: renesas: r9a07g044: Add SPI Multi I/O Bus controller node

Link: https://lore.kernel.org/r/cover.1634298094.git.geert+renesas@glider.be


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents f6bfe014 6be85db4

.mailmap

+1 −0
Original line number Diff line number Diff line
@@ -276,6 +276,7 @@ Nicolas Pitre <nico@fluxnic.net> <nicolas.pitre@linaro.org> 
Nicolas Pitre <nico@fluxnic.net> <nico@linaro.org>

Nicolas Saenz Julienne <nsaenz@kernel.org> <nsaenzjulienne@suse.de>

Nicolas Saenz Julienne <nsaenz@kernel.org> <nsaenzjulienne@suse.com>

Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>

Oleksij Rempel <linux@rempel-privat.de> <bug-track@fisher-privat.net>

Oleksij Rempel <linux@rempel-privat.de> <external.Oleksij.Rempel@de.bosch.com>

Oleksij Rempel <linux@rempel-privat.de> <fixed-term.Oleksij.Rempel@de.bosch.com>

arch/arm64/boot/dts/renesas/ebisu.dtsi

+21 −19
Original line number Diff line number Diff line
@@ -423,14 +423,15 @@ video-receiver@70 { 
		compatible = "adi,adv7482";

		reg = <0x70>;



		#address-cells = <1>;

		#size-cells = <0>;



		interrupt-parent = <&gpio0>;

		interrupt-names = "intrq1", "intrq2";

		interrupts = <7 IRQ_TYPE_LEVEL_LOW>,

			     <17 IRQ_TYPE_LEVEL_LOW>;



		ports {

			#address-cells = <1>;

			#size-cells = <0>;



			port@7 {

				reg = <7>;
@@ -458,6 +459,7 @@ adv7482_txa: endpoint { 
			};

		};

	};

};



&i2c3 {

	status = "okay";

arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi

+33 −0
Original line number Diff line number Diff line
@@ -203,6 +203,11 @@ mmc_pins: mmc { 
		power-source = <1800>;

	};



	qspi0_pins: qspi0 {

		groups = "qspi0_ctrl", "qspi0_data4";

		function = "qspi0";

	};



	scif0_pins: scif0 {

		groups = "scif0_data", "scif0_ctrl";

		function = "scif0";
@@ -214,6 +219,34 @@ scif_clk_pins: scif_clk { 
	};

};



&rpc {

	pinctrl-0 = <&qspi0_pins>;

	pinctrl-names = "default";



	status = "okay";



	flash@0 {

		compatible = "spansion,s25fs512s", "jedec,spi-nor";

		reg = <0>;

		spi-max-frequency = <40000000>;

		spi-rx-bus-width = <4>;



		partitions {

			compatible = "fixed-partitions";

			#address-cells = <1>;

			#size-cells = <1>;



			boot@0 {

				reg = <0x0 0xcc0000>;

				read-only;

			};

			user@cc0000 {

				reg = <0xcc0000 0x3340000>;

			};

		};

	};

};



&rwdt {

	timeout-sec = <60>;

	status = "okay";

arch/arm64/boot/dts/renesas/r8a779a0.dtsi

+1349 −0

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arch/arm64/boot/dts/renesas/r8a779m1.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -10,3 +10,12 @@ 
/ {

	compatible = "renesas,r8a779m1", "renesas,r8a7795";

};



&cluster0_opp {

	opp-2000000000 {

		opp-hz = /bits/ 64 <2000000000>;

		opp-microvolt = <960000>;

		clock-latency-ns = <300000>;

		turbo-mode;

	};

};