Commit fb3466a4 authored by Bhawanpreet Lakha's avatar Bhawanpreet Lakha Committed by Alex Deucher
Browse files

drm/amd/display: Flattening core_dc to dc 



-Flattening core_dc to dc

Signed-off-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 503a7c6f

drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c

+36 −37
Original line number Diff line number Diff line
@@ -27,7 +27,6 @@ 
#include "dcn_calcs.h"

#include "dcn_calc_auto.h"

#include "dc.h"

#include "core_dc.h"

#include "dal_asic_id.h"



#include "resource.h"
@@ -399,7 +398,7 @@ static void pipe_ctx_to_e2e_pipe_params ( 
}



static void dcn_bw_calc_rq_dlg_ttu(

		const struct core_dc *dc,

		const struct dc *dc,

		const struct dcn_bw_internal_vars *v,

		struct pipe_ctx *pipe,

		int in_idx)
@@ -674,45 +673,45 @@ static void calc_wm_sets_and_perf_params( 
		context->bw.dcn.watermarks.d = context->bw.dcn.watermarks.a;

}



static bool dcn_bw_apply_registry_override(struct core_dc *dc)

static bool dcn_bw_apply_registry_override(struct dc *dc)

{

	bool updated = false;



	kernel_fpu_begin();

	if ((int)(dc->dcn_soc->sr_exit_time * 1000) != dc->public.debug.sr_exit_time_ns

			&& dc->public.debug.sr_exit_time_ns) {

	if ((int)(dc->dcn_soc->sr_exit_time * 1000) != dc->debug.sr_exit_time_ns

			&& dc->debug.sr_exit_time_ns) {

		updated = true;

		dc->dcn_soc->sr_exit_time = dc->public.debug.sr_exit_time_ns / 1000.0;

		dc->dcn_soc->sr_exit_time = dc->debug.sr_exit_time_ns / 1000.0;

	}



	if ((int)(dc->dcn_soc->sr_enter_plus_exit_time * 1000)

				!= dc->public.debug.sr_enter_plus_exit_time_ns

			&& dc->public.debug.sr_enter_plus_exit_time_ns) {

				!= dc->debug.sr_enter_plus_exit_time_ns

			&& dc->debug.sr_enter_plus_exit_time_ns) {

		updated = true;

		dc->dcn_soc->sr_enter_plus_exit_time =

				dc->public.debug.sr_enter_plus_exit_time_ns / 1000.0;

				dc->debug.sr_enter_plus_exit_time_ns / 1000.0;

	}



	if ((int)(dc->dcn_soc->urgent_latency * 1000) != dc->public.debug.urgent_latency_ns

			&& dc->public.debug.urgent_latency_ns) {

	if ((int)(dc->dcn_soc->urgent_latency * 1000) != dc->debug.urgent_latency_ns

			&& dc->debug.urgent_latency_ns) {

		updated = true;

		dc->dcn_soc->urgent_latency = dc->public.debug.urgent_latency_ns / 1000.0;

		dc->dcn_soc->urgent_latency = dc->debug.urgent_latency_ns / 1000.0;

	}



	if ((int)(dc->dcn_soc->percent_of_ideal_drambw_received_after_urg_latency * 1000)

				!= dc->public.debug.percent_of_ideal_drambw

			&& dc->public.debug.percent_of_ideal_drambw) {

				!= dc->debug.percent_of_ideal_drambw

			&& dc->debug.percent_of_ideal_drambw) {

		updated = true;

		dc->dcn_soc->percent_of_ideal_drambw_received_after_urg_latency =

				dc->public.debug.percent_of_ideal_drambw;

				dc->debug.percent_of_ideal_drambw;

	}



	if ((int)(dc->dcn_soc->dram_clock_change_latency * 1000)

				!= dc->public.debug.dram_clock_change_latency_ns

			&& dc->public.debug.dram_clock_change_latency_ns) {

				!= dc->debug.dram_clock_change_latency_ns

			&& dc->debug.dram_clock_change_latency_ns) {

		updated = true;

		dc->dcn_soc->dram_clock_change_latency =

				dc->public.debug.dram_clock_change_latency_ns / 1000.0;

				dc->debug.dram_clock_change_latency_ns / 1000.0;

	}

	kernel_fpu_end();
@@ -720,7 +719,7 @@ static bool dcn_bw_apply_registry_override(struct core_dc *dc) 
}



bool dcn_validate_bandwidth(

		const struct core_dc *dc,

		struct dc *dc,

		struct validate_context *context)

{

	const struct resource_pool *pool = dc->res_pool;
@@ -730,8 +729,8 @@ bool dcn_validate_bandwidth( 
	bool bw_limit_pass;

	float bw_limit;



	if (dcn_bw_apply_registry_override(DC_TO_CORE(&dc->public)))

		dcn_bw_sync_calcs_and_dml(DC_TO_CORE(&dc->public));

	if (dcn_bw_apply_registry_override(dc))

		dcn_bw_sync_calcs_and_dml(dc);



	memset(v, 0, sizeof(*v));

	kernel_fpu_begin();
@@ -850,7 +849,7 @@ bool dcn_validate_bandwidth( 
	v->phyclk_per_state[1] = v->phyclkv_mid0p72;

	v->phyclk_per_state[0] = v->phyclkv_min0p65;



	if (dc->public.debug.disable_pipe_split) {

	if (dc->debug.disable_pipe_split) {

		v->max_dispclk[0] = v->max_dppclk_vmin0p65;

	}
@@ -982,15 +981,15 @@ bool dcn_validate_bandwidth( 
	mode_support_and_system_configuration(v);



	if (v->voltage_level == 0 &&

			(dc->public.debug.sr_exit_time_dpm0_ns

				|| dc->public.debug.sr_enter_plus_exit_time_dpm0_ns)) {

		struct core_dc *dc_core = DC_TO_CORE(&dc->public);

			(dc->debug.sr_exit_time_dpm0_ns

				|| dc->debug.sr_enter_plus_exit_time_dpm0_ns)) {

		struct dc *dc_core = dc;



		if (dc->public.debug.sr_enter_plus_exit_time_dpm0_ns)

		if (dc->debug.sr_enter_plus_exit_time_dpm0_ns)

			v->sr_enter_plus_exit_time =

				dc->public.debug.sr_enter_plus_exit_time_dpm0_ns / 1000.0f;

		if (dc->public.debug.sr_exit_time_dpm0_ns)

			v->sr_exit_time =  dc->public.debug.sr_exit_time_dpm0_ns / 1000.0f;

				dc->debug.sr_enter_plus_exit_time_dpm0_ns / 1000.0f;

		if (dc->debug.sr_exit_time_dpm0_ns)

			v->sr_exit_time =  dc->debug.sr_exit_time_dpm0_ns / 1000.0f;

		dc_core->dml.soc.sr_enter_plus_exit_time_us = v->sr_enter_plus_exit_time;

		dc_core->dml.soc.sr_exit_time_us = v->sr_exit_time;

		mode_support_and_system_configuration(v);
@@ -1020,7 +1019,7 @@ bool dcn_validate_bandwidth( 
		context->bw.dcn.calc_clk.dcfclk_deep_sleep_khz = (int)(v->dcf_clk_deep_sleep * 1000);

		context->bw.dcn.calc_clk.dcfclk_khz = (int)(v->dcfclk * 1000);

		context->bw.dcn.calc_clk.dispclk_khz = (int)(v->dispclk * 1000);

		if (dc->public.debug.max_disp_clk == true)

		if (dc->debug.max_disp_clk == true)

			context->bw.dcn.calc_clk.dispclk_khz = (int)(dc->dcn_soc->max_dispclk_vmax0p9 * 1000);

		context->bw.dcn.calc_clk.dppclk_div = (int)(v->dispclk_dppclk_ratio) == 2;
@@ -1109,13 +1108,13 @@ bool dcn_validate_bandwidth( 


			input_idx++;

		}

		if (dc->public.debug.use_dml_wm)

		if (dc->debug.use_dml_wm)

			dcn_dml_wm_override(v, (struct display_mode_lib *)

					&dc->dml, context, pool);

	}



	if (v->voltage_level == 0) {

		struct core_dc *dc_core = DC_TO_CORE(&dc->public);

		struct dc *dc_core = dc;



		dc_core->dml.soc.sr_enter_plus_exit_time_us =

				dc_core->dcn_soc->sr_enter_plus_exit_time;
@@ -1138,7 +1137,7 @@ bool dcn_validate_bandwidth( 
}



unsigned int dcn_find_normalized_clock_vdd_Level(

	const struct core_dc *dc,

	const struct dc *dc,

	enum dm_pp_clock_type clocks_type,

	int clocks_in_khz)

{
@@ -1228,7 +1227,7 @@ unsigned int dcn_find_normalized_clock_vdd_Level( 
}



unsigned int dcn_find_dcfclk_suits_all(

	const struct core_dc *dc,

	const struct dc *dc,

	struct clocks_value *clocks)

{

	unsigned vdd_level, vdd_level_temp;
@@ -1270,7 +1269,7 @@ unsigned int dcn_find_dcfclk_suits_all( 
	return dcf_clk;

}



void dcn_bw_update_from_pplib(struct core_dc *dc)

void dcn_bw_update_from_pplib(struct dc *dc)

{

	struct dc_context *ctx = dc->ctx;

	struct dm_pp_clock_levels_with_voltage clks = {0};
@@ -1310,7 +1309,7 @@ void dcn_bw_update_from_pplib(struct core_dc *dc) 
	kernel_fpu_end();

}



void dcn_bw_notify_pplib_of_wm_ranges(struct core_dc *dc)

void dcn_bw_notify_pplib_of_wm_ranges(struct dc *dc)

{

	struct dm_pp_wm_sets_with_clock_ranges_soc15 clk_ranges = {0};

	int max_fclk_khz, nom_fclk_khz, min_fclk_khz, max_dcfclk_khz,
@@ -1388,7 +1387,7 @@ void dcn_bw_notify_pplib_of_wm_ranges(struct core_dc *dc) 
	dm_pp_notify_wm_clock_changes_soc15(dc->ctx, &clk_ranges);

}



void dcn_bw_sync_calcs_and_dml(struct core_dc *dc)

void dcn_bw_sync_calcs_and_dml(struct dc *dc)

{

	kernel_fpu_begin();

	dm_logger_write(dc->ctx->logger, LOG_BANDWIDTH_CALCS,

drivers/gpu/drm/amd/display/dc/core/dc.c

+81 −81
Original line number Diff line number Diff line
@@ -35,7 +35,6 @@ 
#include "clock_source.h"

#include "dc_bios_types.h"



#include "dce_calcs.h"

#include "bios_parser_interface.h"

#include "include/irq_service_interface.h"

#include "transform.h"
@@ -52,7 +51,7 @@ 
/*******************************************************************************

 * Private functions

 ******************************************************************************/

static void destroy_links(struct core_dc *dc)

static void destroy_links(struct dc *dc)

{

	uint32_t i;
@@ -63,7 +62,7 @@ static void destroy_links(struct core_dc *dc) 
}



static bool create_links(

		struct core_dc *dc,

		struct dc *dc,

		uint32_t num_virtual_links)

{

	int i;
@@ -153,7 +152,7 @@ static bool stream_adjust_vmin_vmax(struct dc *dc, 
		int vmin, int vmax)

{

	/* TODO: Support multiple streams */

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	struct dc_stream_state *stream = streams[0];

	int i = 0;

	bool ret = false;
@@ -179,7 +178,7 @@ static bool stream_get_crtc_position(struct dc *dc, 
		unsigned int *v_pos, unsigned int *nom_v_pos)

{

	/* TODO: Support multiple streams */

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc *core_dc = dc;

	struct dc_stream_state *stream = streams[0];

	int i = 0;

	bool ret = false;
@@ -202,7 +201,7 @@ static bool stream_get_crtc_position(struct dc *dc, 


static bool set_gamut_remap(struct dc *dc, const struct dc_stream_state *stream)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	int i = 0;

	bool ret = false;

	struct pipe_ctx *pipes;
@@ -220,7 +219,7 @@ static bool set_gamut_remap(struct dc *dc, const struct dc_stream_state *stream) 


static bool program_csc_matrix(struct dc *dc, struct dc_stream_state *stream)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	int i = 0;

	bool ret = false;

	struct pipe_ctx *pipes;
@@ -245,7 +244,7 @@ static void set_static_screen_events(struct dc *dc, 
		int num_streams,

		const struct dc_static_screen_events *events)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	int i = 0;

	int j = 0;

	struct pipe_ctx *pipes_affected[MAX_PIPES];
@@ -270,7 +269,7 @@ static void set_drive_settings(struct dc *dc, 
		struct link_training_settings *lt_settings,

		const struct dc_link *link)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	int i;



	for (i = 0; i < core_dc->link_count; i++) {
@@ -288,7 +287,7 @@ static void perform_link_training(struct dc *dc, 
		struct dc_link_settings *link_setting,

		bool skip_video_pattern)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	int i;



	for (i = 0; i < core_dc->link_count; i++)
@@ -369,48 +368,48 @@ void set_dither_option(struct dc_stream_state *stream, 
		opp_program_bit_depth_reduction(pipes->stream_res.opp, &params);

}



static void allocate_dc_stream_funcs(struct core_dc *core_dc)

static void allocate_dc_stream_funcs(struct dc  *core_dc)

{

	if (core_dc->hwss.set_drr != NULL) {

		core_dc->public.stream_funcs.adjust_vmin_vmax =

		core_dc->stream_funcs.adjust_vmin_vmax =

				stream_adjust_vmin_vmax;

	}



	core_dc->public.stream_funcs.set_static_screen_events =

	core_dc->stream_funcs.set_static_screen_events =

			set_static_screen_events;



	core_dc->public.stream_funcs.get_crtc_position =

	core_dc->stream_funcs.get_crtc_position =

			stream_get_crtc_position;



	core_dc->public.stream_funcs.set_gamut_remap =

	core_dc->stream_funcs.set_gamut_remap =

			set_gamut_remap;



	core_dc->public.stream_funcs.program_csc_matrix =

	core_dc->stream_funcs.program_csc_matrix =

			program_csc_matrix;



	core_dc->public.stream_funcs.set_dither_option =

	core_dc->stream_funcs.set_dither_option =

			set_dither_option;



	core_dc->public.link_funcs.set_drive_settings =

	core_dc->link_funcs.set_drive_settings =

			set_drive_settings;



	core_dc->public.link_funcs.perform_link_training =

	core_dc->link_funcs.perform_link_training =

			perform_link_training;



	core_dc->public.link_funcs.set_preferred_link_settings =

	core_dc->link_funcs.set_preferred_link_settings =

			set_preferred_link_settings;



	core_dc->public.link_funcs.enable_hpd =

	core_dc->link_funcs.enable_hpd =

			enable_hpd;



	core_dc->public.link_funcs.disable_hpd =

	core_dc->link_funcs.disable_hpd =

			disable_hpd;



	core_dc->public.link_funcs.set_test_pattern =

	core_dc->link_funcs.set_test_pattern =

			set_test_pattern;

}



static void destruct(struct core_dc *dc)

static void destruct(struct dc *dc)

{

	dc_release_validate_context(dc->current_context);

	dc->current_context = NULL;
@@ -446,10 +445,11 @@ static void destruct(struct core_dc *dc) 


	dm_free(dc->dcn_ip);

	dc->dcn_ip = NULL;



#endif

}



static bool construct(struct core_dc *dc,

static bool construct(struct dc *dc,

		const struct dc_init_data *init_params)

{

	struct dal_logger *logger;
@@ -508,7 +508,7 @@ static bool construct(struct core_dc *dc, 


	dc_ctx->cgs_device = init_params->cgs_device;

	dc_ctx->driver_context = init_params->driver;

	dc_ctx->dc = &dc->public;

	dc_ctx->dc = dc;

	dc_ctx->asic_id = init_params->asic_id;



	/* Create logger */
@@ -621,7 +621,7 @@ void ProgramPixelDurationV(unsigned int pixelClockInKHz ) 


struct dc *dc_create(const struct dc_init_data *init_params)

 {

	struct core_dc *core_dc = dm_alloc(sizeof(*core_dc));

	struct dc *core_dc = dm_alloc(sizeof(*core_dc));

	unsigned int full_pipe_count;



	if (NULL == core_dc)
@@ -636,23 +636,23 @@ struct dc *dc_create(const struct dc_init_data *init_params) 
	full_pipe_count = core_dc->res_pool->pipe_count;

	if (core_dc->res_pool->underlay_pipe_index != NO_UNDERLAY_PIPE)

		full_pipe_count--;

	core_dc->public.caps.max_streams = min(

	core_dc->caps.max_streams = min(

			full_pipe_count,

			core_dc->res_pool->stream_enc_count);



	core_dc->public.caps.max_links = core_dc->link_count;

	core_dc->public.caps.max_audios = core_dc->res_pool->audio_count;

	core_dc->caps.max_links = core_dc->link_count;

	core_dc->caps.max_audios = core_dc->res_pool->audio_count;



	core_dc->public.config = init_params->flags;

	core_dc->config = init_params->flags;



	dm_logger_write(core_dc->ctx->logger, LOG_DC,

			"Display Core initialized\n");





	/* TODO: missing feature to be enabled */

	core_dc->public.debug.disable_dfs_bypass = true;

	core_dc->debug.disable_dfs_bypass = true;



	return &core_dc->public;

	return core_dc;



construct_fail:

	dm_free(core_dc);
@@ -663,14 +663,14 @@ struct dc *dc_create(const struct dc_init_data *init_params) 


void dc_destroy(struct dc **dc)

{

	struct core_dc *core_dc = DC_TO_CORE(*dc);

	struct dc  *core_dc = *dc;

	destruct(core_dc);

	dm_free(core_dc);

	*dc = NULL;

}



static bool is_validation_required(

		const struct core_dc *dc,

		const struct dc *dc,

		const struct dc_validation_set set[],

		int set_count)

{
@@ -705,7 +705,7 @@ static bool is_validation_required( 
}



static bool validate_streams (

		const struct dc *dc,

		struct dc *dc,

		const struct dc_validation_set set[],

		int set_count)

{
@@ -719,7 +719,7 @@ static bool validate_streams ( 
}



static bool validate_surfaces(

		const struct dc *dc,

		struct dc *dc,

		const struct dc_validation_set set[],

		int set_count)

{
@@ -734,11 +734,11 @@ static bool validate_surfaces( 
}



struct validate_context *dc_get_validate_context(

		const struct dc *dc,

		struct dc *dc,

		const struct dc_validation_set set[],

		uint8_t set_count)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc *core_dc = dc;

	enum dc_status result = DC_ERROR_UNEXPECTED;

	struct validate_context *context;
@@ -773,11 +773,11 @@ struct validate_context *dc_get_validate_context( 
}



bool dc_validate_resources(

		const struct dc *dc,

		struct dc *dc,

		const struct dc_validation_set set[],

		uint8_t set_count)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	enum dc_status result = DC_ERROR_UNEXPECTED;

	struct validate_context *context;
@@ -811,10 +811,10 @@ bool dc_validate_resources( 
}



bool dc_validate_guaranteed(

		const struct dc *dc,

		struct dc *dc,

		struct dc_stream_state *stream)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	enum dc_status result = DC_ERROR_UNEXPECTED;

	struct validate_context *context;
@@ -844,7 +844,7 @@ bool dc_validate_guaranteed( 
}



static void program_timing_sync(

		struct core_dc *core_dc,

		struct dc *core_dc,

		struct validate_context *ctx)

{

	int i, j;
@@ -918,7 +918,7 @@ static void program_timing_sync( 
}



static bool context_changed(

		struct core_dc *dc,

		struct dc *dc,

		struct validate_context *context)

{

	uint8_t i;
@@ -935,7 +935,7 @@ static bool context_changed( 
}



static bool streams_changed(

		struct core_dc *dc,

		struct dc *dc,

		struct dc_stream_state *streams[],

		uint8_t stream_count)

{
@@ -961,7 +961,7 @@ bool dc_enable_stereo( 
	bool ret = true;

	int i, j;

	struct pipe_ctx *pipe;

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;



#ifdef ENABLE_FBC

	struct compressor *fbc_compressor = core_dc->fbc_compressor;
@@ -996,7 +996,7 @@ bool dc_enable_stereo( 
 */

static bool dc_commit_context_no_check(struct dc *dc, struct validate_context *context)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc *core_dc = dc;

	struct dc_bios *dcb = core_dc->ctx->dc_bios;

	enum dc_status result = DC_ERROR_UNEXPECTED;

	struct pipe_ctx *pipe;
@@ -1064,7 +1064,7 @@ static bool dc_commit_context_no_check(struct dc *dc, struct validate_context *c 
bool dc_commit_context(struct dc *dc, struct validate_context *context)

{

	enum dc_status result = DC_ERROR_UNEXPECTED;

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	int i;



	if (false == context_changed(core_dc, context))
@@ -1092,7 +1092,7 @@ bool dc_commit_streams( 
	struct dc_stream_state *streams[],

	uint8_t stream_count)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	enum dc_status result = DC_ERROR_UNEXPECTED;

	struct validate_context *context;

	struct dc_validation_set set[MAX_STREAMS] = { {0, {0} } };
@@ -1158,7 +1158,7 @@ bool dc_commit_streams( 
bool dc_post_update_surfaces_to_stream(struct dc *dc)

{

	int i;

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	struct validate_context *context = core_dc->current_context;



	post_surface_trace(dc);
@@ -1375,7 +1375,7 @@ static enum surface_update_type get_scaling_info_update_type( 
}



static enum surface_update_type det_surface_update(

		const struct core_dc *dc,

		const struct dc *dc,

		const struct dc_surface_update *u,

		int surface_index)

{
@@ -1410,7 +1410,7 @@ enum surface_update_type dc_check_update_surfaces_for_stream( 
		struct dc_stream_update *stream_update,

		const struct dc_stream_status *stream_status)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	int i;

	enum surface_update_type overall_type = UPDATE_TYPE_FAST;
@@ -1456,7 +1456,7 @@ void dc_update_planes_and_stream(struct dc *dc, 
		struct dc_stream_state *stream,

		struct dc_stream_update *stream_update)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	struct validate_context *context;

	int i, j;

	enum surface_update_type update_type;
@@ -1781,29 +1781,29 @@ void dc_update_planes_and_stream(struct dc *dc, 
	DC_ERROR("Failed to allocate new validate context!\n");

}



uint8_t dc_get_current_stream_count(const struct dc *dc)

uint8_t dc_get_current_stream_count(struct dc *dc)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc *core_dc = dc;

	return core_dc->current_context->stream_count;

}



struct dc_stream_state *dc_get_stream_at_index(const struct dc *dc, uint8_t i)

struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc *core_dc = dc;

	if (i < core_dc->current_context->stream_count)

		return core_dc->current_context->streams[i];

	return NULL;

}



struct dc_link *dc_get_link_at_index(const struct dc *dc, uint32_t link_index)

struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_index)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	return core_dc->links[link_index];

}



struct dwbc *dc_get_dwb_at_pipe(const struct dc *dc, uint32_t pipe)

struct dwbc *dc_get_dwb_at_pipe(struct dc *dc, uint32_t pipe)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc *core_dc = dc;

	if ((pipe >= dwb_pipe0) && (pipe < dwb_pipe_max_num)) {

		return core_dc->res_pool->dwbc[(int)pipe];

	} else {
@@ -1814,20 +1814,20 @@ struct dwbc *dc_get_dwb_at_pipe(const struct dc *dc, uint32_t pipe) 
const struct graphics_object_id dc_get_link_id_at_index(

	struct dc *dc, uint32_t link_index)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc *core_dc = dc;

	return core_dc->links[link_index]->link_id;

}



enum dc_irq_source dc_get_hpd_irq_source_at_index(

	struct dc *dc, uint32_t link_index)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc *core_dc = dc;

	return core_dc->links[link_index]->irq_source_hpd;

}



const struct audio **dc_get_audios(struct dc *dc)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc *core_dc = dc;

	return (const struct audio **)core_dc->res_pool->audios;

}
@@ -1836,24 +1836,24 @@ enum dc_irq_source dc_interrupt_to_irq_source( 
		uint32_t src_id,

		uint32_t ext_id)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc *core_dc = dc;

	return dal_irq_service_to_irq_source(core_dc->res_pool->irqs, src_id, ext_id);

}



void dc_interrupt_set(const struct dc *dc, enum dc_irq_source src, bool enable)

void dc_interrupt_set(struct dc *dc, enum dc_irq_source src, bool enable)

{

	struct core_dc *core_dc;

	struct dc *core_dc;



	if (dc == NULL)

		return;

	core_dc = DC_TO_CORE(dc);

	core_dc = dc;



	dal_irq_service_set(core_dc->res_pool->irqs, src, enable);

}



void dc_interrupt_ack(struct dc *dc, enum dc_irq_source src)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	dal_irq_service_ack(core_dc->res_pool->irqs, src);

}
@@ -1861,7 +1861,7 @@ void dc_set_power_state( 
	struct dc *dc,

	enum dc_acpi_cm_power_state power_state)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	atomic_t ref_count;



	switch (power_state) {
@@ -1889,9 +1889,9 @@ void dc_set_power_state( 


}



void dc_resume(const struct dc *dc)

void dc_resume(struct dc *dc)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;



	uint32_t i;
@@ -1906,7 +1906,7 @@ bool dc_read_aux_dpcd( 
		uint8_t *data,

		uint32_t size)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;



	struct dc_link *link = core_dc->links[link_index];

	enum ddc_result r = dal_ddc_service_read_dpcd_data(
@@ -1926,7 +1926,7 @@ bool dc_write_aux_dpcd( 
		const uint8_t *data,

		uint32_t size)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	struct dc_link *link = core_dc->links[link_index];



	enum ddc_result r = dal_ddc_service_write_dpcd_data(
@@ -1947,7 +1947,7 @@ bool dc_read_aux_i2c( 
		uint8_t *data,

		uint32_t size)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;



		struct dc_link *link = core_dc->links[link_index];

		enum ddc_result r = dal_ddc_service_read_dpcd_data(
@@ -1968,7 +1968,7 @@ bool dc_write_aux_i2c( 
		const uint8_t *data,

		uint32_t size)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	struct dc_link *link = core_dc->links[link_index];



	enum ddc_result r = dal_ddc_service_write_dpcd_data(
@@ -1990,7 +1990,7 @@ bool dc_query_ddc_data( 
		uint8_t *read_buf,

		uint32_t read_size) {



	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;



	struct dc_link *link = core_dc->links[link_index];
@@ -2010,7 +2010,7 @@ bool dc_submit_i2c( 
		uint32_t link_index,

		struct i2c_command *cmd)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;



	struct dc_link *link = core_dc->links[link_index];

	struct ddc_service *ddc = link->ddc;
@@ -2129,7 +2129,7 @@ void dc_link_remove_remote_sink(struct dc_link *link, struct dc_sink *sink) 
bool dc_init_dchub(struct dc *dc, struct dchub_init_data *dh_data)

{

	int i;

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	struct mem_input *mi = NULL;



	for (i = 0; i < core_dc->res_pool->pipe_count; i++) {
@@ -2155,7 +2155,7 @@ bool dc_init_dchub(struct dc *dc, struct dchub_init_data *dh_data) 


void dc_log_hw_state(struct dc *dc)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc *core_dc = dc;



	if (core_dc->hwss.log_hw_state)

		core_dc->hwss.log_hw_state(core_dc);

drivers/gpu/drm/amd/display/dc/core/dc_debug.c

+10 −10
Original line number Diff line number Diff line
@@ -37,12 +37,12 @@ 
} while (0)



void pre_surface_trace(

		const struct dc *dc,

		struct dc *dc,

		const struct dc_plane_state *const *plane_states,

		int surface_count)

{

	int i;

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	struct dal_logger *logger =  core_dc->ctx->logger;



	for (i = 0; i < surface_count; i++) {
@@ -158,12 +158,12 @@ void pre_surface_trace( 
}



void update_surface_trace(

		const struct dc *dc,

		struct dc *dc,

		const struct dc_surface_update *updates,

		int surface_count)

{

	int i;

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	struct dal_logger *logger =  core_dc->ctx->logger;



	for (i = 0; i < surface_count; i++) {
@@ -279,9 +279,9 @@ void update_surface_trace( 
	SURFACE_TRACE("\n");

}



void post_surface_trace(const struct dc *dc)

void post_surface_trace(struct dc *dc)

{

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	struct dal_logger *logger =  core_dc->ctx->logger;



	SURFACE_TRACE("post surface process.\n");
@@ -289,11 +289,11 @@ void post_surface_trace(const struct dc *dc) 
}



void context_timing_trace(

		const struct dc *dc,

		struct dc *dc,

		struct resource_context *res_ctx)

{

	int i;

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	struct dal_logger *logger =  core_dc->ctx->logger;

	int h_pos[MAX_PIPES], v_pos[MAX_PIPES];

	struct crtc_position position;
@@ -328,11 +328,11 @@ void context_timing_trace( 
}



void context_clock_trace(

		const struct dc *dc,

		struct dc *dc,

		struct validate_context *context)

{

#if defined(CONFIG_DRM_AMD_DC_DCN1_0)

	struct core_dc *core_dc = DC_TO_CORE(dc);

	struct dc  *core_dc = dc;

	struct dal_logger *logger =  core_dc->ctx->logger;



	CLOCK_TRACE("Current: dispclk_khz:%d  dppclk_div:%d  dcfclk_khz:%d\n"

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

+1 −2
Original line number Diff line number Diff line
@@ -25,7 +25,6 @@ 


#include "dm_services.h"

#include "core_types.h"

#include "core_dc.h"

#include "timing_generator.h"

#include "hw_sequencer.h"
@@ -55,7 +54,7 @@ static const struct tg_color black_color_format[] = { 
};



void color_space_to_black_color(

	const struct core_dc *dc,

	const struct dc *dc,

	enum dc_color_space colorspace,

	struct tg_color *black_color)

{

drivers/gpu/drm/amd/display/dc/core/dc_link.c

+9 −10
Original line number Diff line number Diff line
@@ -26,14 +26,13 @@ 
#include "dm_services.h"

#include "dm_helpers.h"

#include "dc.h"

#include "core_dc.h"

#include "grph_object_id.h"

#include "gpio_service_interface.h"

#include "core_status.h"

#include "dc_link_dp.h"

#include "dc_link_ddc.h"

#include "link_hwss.h"

#include "stream_encoder.h"



#include "link_encoder.h"

#include "hw_sequencer.h"

#include "resource.h"
@@ -1392,7 +1391,7 @@ enum dc_status dc_link_validate_mode_timing( 
bool dc_link_set_backlight_level(const struct dc_link *link, uint32_t level,

		uint32_t frame_ramp, const struct dc_stream_state *stream)

{

	struct core_dc *core_dc = DC_TO_CORE(link->ctx->dc);

	struct dc  *core_dc = link->ctx->dc;

	struct abm *abm = core_dc->res_pool->abm;

	unsigned int controller_id = 0;

	int i;
@@ -1431,7 +1430,7 @@ bool dc_link_set_backlight_level(const struct dc_link *link, uint32_t level, 


bool dc_link_set_abm_disable(const struct dc_link *link)

{

	struct core_dc *core_dc = DC_TO_CORE(link->ctx->dc);

	struct dc  *core_dc = link->ctx->dc;

	struct abm *abm = core_dc->res_pool->abm;



	if ((abm == NULL) || (abm->funcs->set_backlight_level == NULL))
@@ -1445,7 +1444,7 @@ bool dc_link_set_abm_disable(const struct dc_link *link) 


bool dc_link_set_psr_enable(const struct dc_link *link, bool enable)

{

	struct core_dc *core_dc = DC_TO_CORE(link->ctx->dc);

	struct dc  *core_dc = link->ctx->dc;

	struct dmcu *dmcu = core_dc->res_pool->dmcu;



	if (dmcu != NULL && link->psr_enabled)
@@ -1456,7 +1455,7 @@ bool dc_link_set_psr_enable(const struct dc_link *link, bool enable) 


bool dc_link_get_psr_state(const struct dc_link *link, uint32_t *psr_state)

{

	struct core_dc *core_dc = DC_TO_CORE(link->ctx->dc);

	struct dc  *core_dc = link->ctx->dc;

	struct dmcu *dmcu = core_dc->res_pool->dmcu;



	if (dmcu != NULL && link->psr_enabled)
@@ -1469,7 +1468,7 @@ bool dc_link_setup_psr(struct dc_link *link, 
		const struct dc_stream_state *stream, struct psr_config *psr_config,

		struct psr_context *psr_context)

{

	struct core_dc *core_dc = DC_TO_CORE(link->ctx->dc);

	struct dc  *core_dc = link->ctx->dc;

	struct dmcu *dmcu = core_dc->res_pool->dmcu;

	int i;
@@ -1874,7 +1873,7 @@ static enum dc_status deallocate_mst_payload(struct pipe_ctx *pipe_ctx) 


void core_link_enable_stream(struct pipe_ctx *pipe_ctx)

{

	struct core_dc *core_dc = DC_TO_CORE(pipe_ctx->stream->ctx->dc);

	struct dc  *core_dc = pipe_ctx->stream->ctx->dc;



	enum dc_status status = enable_link(pipe_ctx);
@@ -1907,7 +1906,7 @@ void core_link_enable_stream(struct pipe_ctx *pipe_ctx) 


void core_link_disable_stream(struct pipe_ctx *pipe_ctx)

{

	struct core_dc *core_dc = DC_TO_CORE(pipe_ctx->stream->ctx->dc);

	struct dc  *core_dc = pipe_ctx->stream->ctx->dc;



	if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)

		deallocate_mst_payload(pipe_ctx);
@@ -1919,7 +1918,7 @@ void core_link_disable_stream(struct pipe_ctx *pipe_ctx) 


void core_link_set_avmute(struct pipe_ctx *pipe_ctx, bool enable)

{

	struct core_dc *core_dc = DC_TO_CORE(pipe_ctx->stream->ctx->dc);

	struct dc  *core_dc = pipe_ctx->stream->ctx->dc;



	if (pipe_ctx->stream->signal != SIGNAL_TYPE_HDMI_TYPE_A)

		return;