Commit fd6435ea authored by Vinod Govindapillai's avatar Vinod Govindapillai Committed by Stanislav Lisovskiy
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drm/i915/reg: use the correct register to access SAGV block time 



Wrong register address is used to read the SAG block time. Fix
the register address according to the bspec.

Bspec: 64608

Signed-off-by: default avatarVinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: default avatarStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: default avatarStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323114426.41136-3-vinod.govindapillai@intel.com
parent ff168b37

drivers/gpu/drm/i915/i915_reg.h

+1 −1
Original line number Diff line number Diff line
@@ -7740,7 +7740,7 @@ enum skl_power_gate { 
#define  MTL_LATENCY_LEVEL_EVEN_MASK	REG_GENMASK(12, 0)

#define  MTL_LATENCY_LEVEL_ODD_MASK	REG_GENMASK(28, 16)



#define MTL_LATENCY_SAGV		_MMIO(0x4578b)

#define MTL_LATENCY_SAGV		_MMIO(0x4578c)

#define   MTL_LATENCY_QCLK_SAGV		REG_GENMASK(12, 0)



#define MTL_MEM_SS_INFO_GLOBAL			_MMIO(0x45700)