Commit fd817375 authored by Rohit Agarwal's avatar Rohit Agarwal Committed by Bjorn Andersson
Browse files

ARM: dts: qcom: sdx65-mtp: Enable PCIe EP



Enable PCIe Endpoint controller on the SDX65 MTP board based
on Qualcomm SDX65 platform.

Signed-off-by: default avatarRohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1684432073-28490-6-git-send-email-quic_rohiagar@quicinc.com
parent 2e69f688
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+35 −0
Original line number Diff line number Diff line
@@ -250,6 +250,18 @@ &ipa {
	status = "okay";
};

&pcie_ep {
	pinctrl-0 = <&pcie_ep_clkreq_default
		     &pcie_ep_perst_default
		     &pcie_ep_wake_default>;
	pinctrl-names = "default";

	reset-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
	wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;

	status = "okay";
};

&pcie_phy {
	vdda-phy-supply = <&vreg_l1b_1p2>;
	vdda-pll-supply = <&vreg_l4b_0p88>;
@@ -281,6 +293,29 @@ &remoteproc_mpss {
	status = "okay";
};

&tlmm {
	pcie_ep_clkreq_default: pcie-ep-clkreq-default-state {
		pins = "gpio56";
		function = "pcie_clkreq";
		drive-strength = <2>;
		bias-disable;
	};

	pcie_ep_perst_default: pcie-ep-perst-default-state {
		pins = "gpio57";
		function = "gpio";
		drive-strength = <2>;
		bias-pull-down;
	};

	pcie_ep_wake_default: pcie-ep-wake-default-state {
		pins = "gpio53";
		function = "gpio";
		drive-strength = <2>;
		bias-disable;
	};
};

&usb {
	status = "okay";
};